Transcript Lecture 7 Overview - Welcome to the University of Delaware
Solution: R-2R Ladder
V out
V out
R f R V ref D
0 16
D
1 8
D
2 4
D
3 2 • Using just R and 2R removes the problems of the weighted adder • R values are reasonable • Precision requirements can be met • RC time constants are small These are digital switches
R-2R Ladder: Thevenin analysis
V out
R f R V ref D
0 16
D
1 8
D
2 4
D
3 2 How do we end up with these weights? Apply Thevenin's...
Announcements
• Assignment 8 posted
– Due Tomorrow. A bit longer than others .
• Project progress?
• Dates
– Tuesday 12/6 project demonstrations in the lab (no presentations) – Sunday 12/11 project reports due to me
by email
– Tuesday 12/13 final exam, 1pm-3pm here.
Lecture 25: Review
Exam preparation – use assignments, go over the mid-term (solutions posted on Assignments page). Use this review.
Practice with EWB
Can ’ t review everything – focus on some older stuff today • Simple circuits: equivalent circuits (work for both AC & DC) • KCL KVL; mesh or nodal analysis. Works for AC & DC • Thevenin & Norton circuits • Transient circuits; capacitors & inductors • These notes contain (much) more, and will be posted on the web
Simple circuits
• Voltage/Current sources: provide prescribed voltage/current regardless of load • Kirchoff's current law : The sum of currents into a node=0 • Kirchoff's Voltage Law : The sum of voltages round a closed loop=0 •Voltage divider:
v
1
R
1
R EQ v total
•Current divider
i
1
R EQ i S R
1
Circuit analysis method 1: Apply element combination rules
Series resistors Parallel resistors Series voltage sources Parallel current sources
Mesh Analysis
Example: 2 meshes (Mesh is a loop that does not contain other loops)
Step 1
: Assign mesh currents clockwise
Step 2
: Apply KVL to each mesh • The self-resistance is the effective resistance of the resistors in series within a mesh. The mutual resistance is the resistance that the mesh has in common with the neighbouring mesh • To write the mesh equation, evaluate the self-resistance, then multiply by the mesh current • Next, subtract the mutual resistance multiplied by the current in the neighbouring mesh for each neighbour.
• Equate the above result to the driving voltage: taken to be positive if it tends to push current in the same direction as the assigned mesh current Mesh1: Mesh2:
(R 1 +R 2 )I 1 - R 2 I 2 -R 2 I 1 + (R 2 +R 3 )I 2 =ε =ε 2 1 -ε -ε 3 2
Step 3
: solve currents: use substitution or Cramer's rule
Cramer's Rule
Step 3
: solve currents: use substitution or Cramer's rule
PRACTICE!!!
http://sole.ooz.ie/en I I 2 I 3 = 0 4I + 5I 2 + 0I 3 = 3 0I - 5I 2 + 10I 3 = 0
Mesh Analysis with 3 loops
Mesh analysis with a current source
Magnitude of current in mesh containing current source is
I S
(although if the current flow is opposite , to the assigned current direction the value will be negative ). This works only if the current source is not shared by any other mesh For a shared current source, label it with an unknown voltage.
Example
• In this circuit, find the value of I s resistor to zero.
that will reduce the voltage across the 4 Ω
Example
• In this circuit, find the value of I s resistor to zero.
that will reduce the voltage across the 4 Ω Mesh equation: when 4 Ω voltage=0: • What if the 2 Ω and the 6 Ω resistors are swapped?
Example II
• Which of the two circuits has the larger terminal voltage, A or B?
• Which has the larger current through the 9V battery?
• Practical batteries are modelled as voltage sources in series with a resistor.
Example II
• Which of the two circuits has the larger terminal voltage, A or B?
• Which has the larger current through the 9V battery?
• Practical batteries are modelled as voltage sources in series with a resistor.
Mesh equations: i 1 = current through 9V battery solve to give i 1 =0.41A
Mesh equations: i 1 = current through 9V battery solve to give i 1 = -0.56A
Example II
• Which of the two circuits has the larger terminal voltage, A or B?
• Which has the larger current through the 9V battery?
• Practical batteries are modelled as voltage sources in series with a resistor.
x V R + + i 1 y V R x + + i 1 y i 1 = current through battery solve to give i 1 =0.41A
i 1 = current through battery solve to give i 1 = -0.56A
Thevenin and Norton Equivalent Circuits
load Any network of sources and resistors will appear to the circuit connected to it as a single voltage source and a series resistance load
v TH
= open circuit voltage at terminal (a.k.a. port)
R TH
= Resistance of the network as seen from port (
V m
’
s,
I n
’
s set to zero)
Thevenin and Norton Equivalent Circuits
Any network of sources and resistors will appear to the circuit connected to it as a single current source and a parallel resistance How do we calculate R T , V T , i N , R N ?
Calculation of R
T
and R
N
•
R T =R N
; same calculation • Set all sources to zero ( ‘ kill ’ – Short voltage sources the sources) – Open Current sources • Calculate equivalent resistance seen by the load
Calculation of V
T • Remove the load and calculate the open circuit voltage • The Thevenin equivalent is then V T in series with R T
• Find the Thevenin equivalent
Example
• Find the Thevenin equivalent
Example
• Find the Thevenin equivalent
Example
Y X X Y
• Capacitors in series: • Capacitors in parallel:
AC circuit elements
1
V
V
3 1
C eq C eq
q V q
V
1
q
1
V
2
q
2
q
q
3
V
C
1
C
1
C
2 1
C
2
C
3 1
C
3 • Capacitive impedance: Z C =1/j ωC • Inductors in series: • Inductors in parallel: • Inductive impedance: Z L = j ωL
L eq
L
1
L
2
L
3 1
L eq
1
L
1 1
L
2 1
L
3 • Circuit analysis tools for DC circuits work on AC circuits, but replace resistance with complex impedance
AC circuit analysis example
If V 1 =10cos(1000t) (volts) and V 2 =5cos(1000t) (volts), what is the current through the capacitor?
AC circuit analysis example
If V 1 =10cos(1000t) (volts) and V 2 =5cos(1000t) (volts), what is the current through the capacitor?
Mesh 1: (100+Z C )I 1 -Z C I 2 =V 1 Mesh 2: -Z c I 1 +(Z c +Z L )I 2 =-V 2
Z C Z L
1
j
jL C
j
1000 1000 1 10 0 .
1
j
5 100 100
j j I
1 10 5 100 100 100
j
0
j
100
j
500
j
10000 0 .
05
j
100
j
0 100 100
j I
2 100
j
100 100
j
100
j
10 5 100
j
500 500
j
1000
j
0 .
05 0 .
05
j
10000 0 I C (jω)=I 1 (jω)-I 2 (jω)=0.05j+0.05+0.05j=0.05+0.1j
φ=tan -1 (0.1/0.05) = 63 degrees A=√(0.05
2 +0.1
2 )=0.11
I C (jω)=0.11
63 i C (t)=0.11cos(1000t+63)
Charging a capacitor
0.37
Time constant τ=RC. Time needed to charge capacitor to 63% of full charge Larger RC means the capacitor takes longer to charge Larger R implies smaller current flow The larger C is, the more charge the capacitor can hold.
Solution is only true for simple circuit with resistor and capacitor in series, but more complicated circuits can be reduced to this using Thevenin's Theorem
Example
A battery with an emf of 1.5V and an internal resistance of 0.6
Ω is used to charge a 5F capacitor when a switch is closed. How long does it take to reach a voltage across the capacitor of 1V?
5F
Example
A battery with an emf of 1.5V and an internal resistance of 0.6
Ω is used to charge a 5F capacitor when a switch is closed. How long does it take to reach a voltage across the capacitor of 1V?
5F
Example
How long does it take if we attach an additional battery with an emf of 9V and an internal resistance of 18 Ω as shown?
5F
Example
How long does it take if we attach an additional battery with an emf of 9V and an internal resistance of 18 Ω as shown?
5F R TH =0.58 Ohm i= 0.40 A V TH =1.74 V 5F Time to 1V= 2.5 seconds
Op Amps
Remember the Golden Rules: 1) i in =0: no current flows into the opamp.
2) v + =v These are only valid when there is negative feedback In many circuits, one input to the opamp is connected to ground, so v + =v =0 A simple example:
Op Amp circuits
Inverting Amplifier
v out v S
R F R S
Summing Amplifier
v out
R F R S
1
v S
1
R F R S
2
v S
2 .....
R F R SN v SN
Non-Inverting Amplifier
v out
1
R F v S R S v out
Differential Amplifier
R R
1 2 (
v
2
v
1 )
Integrator Differentiator
v out
(
t
) 1
R S C F t
v S
(
t
)
dt
And two without negative feedback: Comparator
v out
(
t
)
R F C S dv S dt
Schmitt Trigger
Example
What does this circuit do? Derive an expression for the gain and give the circuit a suitable name.
R 1 i 1 i 2 R 2
i
1
v
1
i
v
2
R
1 0
v out
R
2
v
v
) R 1 R 2 R 1 =R 2
v
1
v
(
v out v out v
2
v
v
v
1 voltage divider
v
R
1
R
2
R
2
v
2
v
v
v out
1 2
v
2
v
2
v
1
Example
Design an opamp circuit to convert the triangular waveform v 1 figure into the square wave v 0 in the following shown. Use a 0.1
μF capacitor. (Hint: first quantitatively determine the mathematical expression of v 0 in terms of v 1 ) v 0 is v 1 differentiated
v o
K dv
1
dt
Simple Filter analysis: Which of the following is a low-pass filter?
•What happens to the output voltage when ω→0 (DC condition)?
•In DC circuits, capacitors are open, inductors are shorts.
•or when ω→∞ •At very high frequencies, capacitors are shorts, inductors are open Answer: (c)
For a more quantitative solution, find the complex transfer function:
• RC low-pass filter: preserves lower frequencies, attenuates frequencies above the 3dB cutoff frequency ω 0 =1/RC.
0 1
RC X dB
20 log 10
X X
0
X dB
20 log 10 (For voltage) 1 2 3 dB H V (
j
) V o ( V i (
j
)
j
) V o (
j
)
Z C Z
C Z R
V i (
j
) H V (
j
) 1
j
C
1
j
C
R
1 1
j
RC
1 1 (
RC
) 2
e j j
0
e
tan 1
RC
1 1 1 (
RC
) 2
e
j
tan 1
RC
1 1 (
RC
) 2
e
j
tan 1 / 0
Example
Design a high-pass RC filter with a 3dB frequency cutoff of 80Hz using a capacitor of 2 μF
H V
(
j
)
V out V in
R
H
1 1 1 (
RC
) 2 0
R
1 /
RC
1 /( 2 80 2 10 6 )
R
980
R
1
j
C
1 1
j
RC
Active Filters
V out V S
Z F Z S V out V S
1
Z F Z S
Example
Given an input signal V i =10mV(sin10t+sin10,000t), design a circuit such that the output signal is V O = -100mV(sin10t). The high frequency component of the output signal must be <1% of the low frequency part.
So, we want a circuit which amplifies the voltage, but only at low frequencies: need an active filter.
A
(
j
)
V out V S
Z F Z S
1
Z F
1
R F
1 1
j
C F Z F
1
R F j
R F C F A
(
j
) 1
R j F
/
R R S F C F
Example
Given an input signal V i =10mV(sin10t+sin10,000t), design a circuit such that the output signal is V O = -100mV(sin10t). The high frequency component of the output signal must be <1% of the low frequency part.
So, we want a circuit which amplifies the voltage, but only at low frequencies: need an active filter.
A
( 1
Z F Z F j
)
V out V S
1
R F
1
Z F Z S
1 1
j
C F R F j
R F C F A
(
j
) 1
R j F
/
R R S F C F
Low frequency ω 1 : Want a gain of 10 ω 1 R F C F <<1 so set R S =1k Ω set R F =10k Ω
A
(
j
)
V out V S
High frequency ω 2 : Low frequency gain=10, so for <1%, need high frequency gain <1/10
R F R S
10 Check low frequency:
Combinational logic design steps:
1. Derive the Truth Table 2. Fill the Karnaugh map 3. Use the map to find the logic 4. Implement the logic in a circuit
Another Example: 7 segment displays Karnaugh Map for "a" Truth Table "x" represents a "don't care" condition - the value can be either 0 or 1
• Box the ones for sum-of-products This subcube: B This subcube: A·C This subcube: D This subcube: A'·C'
• Realization (sum-of-products) is B+D+ A·C+ A'·C'
Sequential logic design steps:
1. List the states - assign each state a symbol 2. Draw the finite state diagram (Moore - states inside nodes) 3. Derive the symbolic state transition table 4. Assign each state a binary code (also each output, if more than one) 5. Derive the actual state transition table 6. Write out the Karnaugh map for each "next state" and output(s) 7. Solve the maps to find the logic 8. Implement the logic in a circuit
3-bit binary up-counter:
List the states: 0 to 7 Draw the finite state diagram 3-bit up-counter Derive the symbolic transition table 3 4 5 6 7 current state 0 000 1 2 001 010 011 100 101 110 111 next state 001 1 010 011 2 3 100 101 110 111 000 4 5 6 7 0
Assign the states a binary code 001 010 011 000 111 3-bit up-counter 110 101 100 Derive the actual state transition table 3 4 5 6 7 current state 0 000 1 2 001 010 011 100 101 110 111 next state 001 1 010 011 2 3 100 101 110 111 000 4 5 6 7 0
Derive the actual state transition table 0 0 1 1 1 1 current next C3 C2 C1 N3 N2 N1 0 0 0 0 0 1 0 0 1 0 1 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 1 1 1 0 1 0 0 1 1 0 1 0 1 0 1 0 Karnaugh maps for each "next state": N3 C3 C3C2 00 01 11 10 N2 C1 0 0 0 1 1 0 C1 1 0 1 0 1 C1 1 C2 1 0 C2 0 1 C3 0 1 Solve the maps notation to show function representing input to D-FF N1 := C1' N2 := C1C2' + C1'C2 := C1 xor C2 N3 := C1C2C3' + C1'C3 + C2'C3 := C1C2C3' + (C1' + C2')C3 := C1C2C3' + (C1C2)'C3 := (C1C2) xor C3 N1 1 C1 0 1 0 C2 0 1 C3 1 0
0 0 1 1 1 1 current next C3 C2 C1 N3 N2 N1 0 0 0 0 0 1 0 0 1 0 1 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 1 1 1 0 1 0 0 1 1 0 1 0 1 0 1 0 N1 := C1' N2 := C1C2' + C1'C2 := C1 xor C2 N3 := C1C2C3' + C1'C3 + C2'C3 := C1C2C3' + (C1' + C2')C3 := (C1C2) xor C3 Implement the logic: each state bit requires one memory element (flipflop)