Transcript Focus Center Research Program (FCRP)

An Industry Perspective on University Research
Relations
Marie Burnham
External Research
Motorola, SPS
[email protected]
SWEEDA WORKSHOP Sedona, AZ
External Research Group, Marie Burnham
16Nov01
RESEARCH
University/Industry Value:
NETWORKING
RELATIONSHIPS
STUDENTS
I.
SIA driven university research organizations:
SRC/MARCO
II. Motorola Intern Program
III. IP and us
SWEEDA WORKSHOP Sedona, AZ
External Research Group, Marie Burnham
16Nov01
U.S. Semiconductor Industry
Consortia Partners
SIA
1977
SRC
1982
Tax, Trade &
Technology Policy
FCRP
1997
Research & Education
SEMATECH
1987
Development & Infrastructure
SWEEDA WORKSHOP Sedona, AZ
External Research Group, Marie Burnham
16Nov01
SIA/SRC/iSEMATECH/SISA/FCRP Membership
* SRC Science Area Members
** SRC Affiliate Member
*** SRC US Gov't Participant
**** SRC Strategic Industry Partners
***** SRC Associate Member
****** SRC Adjunct Member
Eastman Kodak
UMC
Charter
*Axcelis
*Cadence
*Mentor Graphics
*Shipley
*Synopsys
*Ultratech Stepper
**Numerical Technologies
***DARPA
SISA
87
Others
**Coventor
**ISE
**Mission Research
**PDF Solutions
**SILVACO
**Tessera, Inc
**Testchip Technologies
*Novellus
FCRP
Air Products
Applied Materials
KLA-Tencor
SCP Global Tech.
SpeedFam/IPEC
Teradyne
Veriflo
LSI Logic
National
**Torrex
**Ziptronix
***NIST
***NSF
****ISMT
****SEMI
****SIA *
****SISA
*****MITRE Corporation
******Compaq
SRC
SIA
Advanced Micro Devices
Agere Systems
Conexant Systems
IBM Corporation
Intel Corporation
Motorola
Texas Instruments
Micron
Agilent Technologies
Analog Devices
Cypress Semiconductor
Xilinx
Hewlett-Packard
ISMT
Hyundai
Infineon Technologies
Phillips
STMicroelectronics
TSMC
Intersil
Last Update: 10/5/2001
The
a tax-free and not-for-profit arm of the SIA
• MISSION: Helps solve North American semiconductor industry’s technical
challenges with long-range (3-8yr) university research.
• CHARTER: Manage the research done by graduate students for a consortia of
12 full and 23 partial membership companies and government agencies.
• STRATEGY: Provide a framework to make decisions by the SRC management,
and full-member company management (BoD, SACCs and TABs), and being
responsive to the ITRS formed by the SIA.
• SIA :
• ITRS:
•
•
•
•
•
BoD:
ETAB:
SACC:
TAB:
FCRP:
• MARCO
• ISMT
Lexico
Semiconductor
Industry Association
n
International Technology Roadmap for
Semiconductors
Board of Directors
Executive Technical Advisory Board
Science Area Coordinating Committee
Technical Advisory Board
Focus Center Research Program (for
longer term research > 8yrs)
Microelectronics Advanced Research
COrporation started 2 FCRPs in 1998:
Interconnects and Design and Test
International Sematech
The Numbers ( most are approximate )
• The SRC funded > $30M of fellowships, grants,
contracts, and projects in 2001
• Motorola has hired almost 160 SRC advanced
degree engineers/scientists from ‘89-present.
• The Motorola SRC team is > 90 technologists.
• 850 students supervised by 230 profs on 300
research tasks at 72 univ’s in US, Taiwan, Ca, and
Germany
SWEEDA WORKSHOP Sedona, AZ
External Research Group, Marie Burnham
16Nov01
Motorola SRC Science Area Organization
BoD: Sherry Gillespie
ETAB: Marie Burnham, Cotton Hance
Synthesis and
Verification
Carl Pixley
Test and
Testability
Magdy Abadir
Logic and Physical
Design
Pat McGuinness
Pradipto Mukherjee
Computer-Aided Design
and Test Sciences (CADTS)
Circuit Design
Andrew Martin
Systems Design
Gordon McGregor
Integrated Circuit
Systems Sciences (ICSS)
Interconnect Systems
Chris Chun, Dave Cave
Bill Read
Cross-disciplinary Semiconductor Research (CSR)
Material and Process
Sciences (MPS)
Clarence Tracy
Environment, Safety
and Health (ESH)
Victor Vartanian, H-A Hwang
Front End
Processes (FEP)
Clarence Tracy, Hsing Tseng
Modeling and Simulation
Patterning
Lloyd Litt, Scott Hector
Nanostructures and
Integration Sciences (NIS)
Gari Harris
Advanced Devices
Packaging and
and Technologies (ADT)
Interconnect Systems
Darrel Frear, Andrew Mawer Bruce White, Rainer Thoma
Factory Systems
Shekar Krishnaswami
Back End
Processes (BEP)
Brad Melnick, Peter Ventzek
SWEEDA WORKSHOP Sedona, AZ
External Research Group, Marie Burnham
16Nov01
SRC’s Role
Other
Consortia
National
Labs
Govt.
Agencies
SRC Concurrently
Managed Phases
Research
Institutions
Industry
Universities
Planning Phase
Research
Organizations
Initiation Phase
SRC
Participants
Performance & Evaluation Phase
Tech Transfer Phase
Relevantly Educated
Scientific Workforce
Advanced Enabling
Technologies
Increased Competitiveness
for Industry
Research Selection and
Funding Process






Member-driven creation of needs document
Request and submission of white papers
Member review and selection of proposals to seek
Request for proposals
Member review and selection of proposals to fund
Internal SRC Research Management Committee
review
 Only Excellent Proposals are funded
 Three-year contract start (Typical)
 Annual member reviews of progress
 Submission of reports and “deliverables” by
researchers
2001 SRC University Survey
Results to date.
70 of 75 university researchers said SRC was
sponsor of choice
 SRC is responsive
 (+) Detailed involvement of industry
 (+) Attention to the students
 (-) Funding amounts are too small
 (-) Administrative overhead is too larger
 (-) Want more liaison involvement
SWEEDA WORKSHOP Sedona, AZ
External Research Group, Marie Burnham
16Nov01
Summary Results of SRC ETAB
Summer Study (june, 2001)
New Research Areas (prioritized):
– Optoelectronics: chip-to-chip, integration with
electronics.
– Embedded Software: must be research.
– Ultra low power heterogeneous system
integration.
– Low cost, high throughput, maskless
patterning for VLSI.
SWEEDA WORKSHOP Sedona, AZ
External Research Group, Marie Burnham
16Nov01
Semiconductor Research Timeline
98
04
07
10
13
Industry
• Largely company
specific
• Product emphasis
Increasing Cost of Research
$
01
Reduced funding
and
SEMATECH &
SUPPLIERS
• Largely tool specific
• Industry
manufacturing
standards
• manufacturing path
to commercialization
Development
less publically
available
SRC
• Company specified
research
• Student emphasis
• Emphasize
technology transfer
• Company funded INDUSTRIAL LABS
• Bell Labs
• IBM Research
• GE Research
DoD R&D
Programs
Applied Research
$175,000,000
• Focus Centers ($40-60M)
• Nanoelectronics($85M of
$.5B)
• Litho ($40M)
• Moletronics($10M)
Exploratory Research
N
N+1
N+2
N+3
Product Generation
SWEEDA WORKSHOP Sedona, AZ
External Research Group, Marie Burnham
16Nov01
N+4
SWEEDA WORKSHOP Sedona, AZ
External Research Group, Marie Burnham
16Nov01
Motorola’s Intern/Co-op Program
The Motorola Intern/Co-op Program is a strategic college-recruiting tool.
The goal of the program is to identify and attract critical talent for regular
full-time employment.
Tera Martinez
Regional University Relations Manager
[email protected]
(817) 245-2976
Pager: 1800SKYTEL2 PIN# 1332302
SWEEDA WORKSHOP Sedona, AZ
External Research Group, Marie Burnham
16Nov01
Motorola’s Intern/Co-op Program
Give students real experience
Internships and Co-ops are intended to give the student a way to gain experience in
his/her field of study. It is also a tremendous opportunity for the student to work with
cutting edge technology and to gain “real” work experience. Students can also see what
classes and experiences will be needed to be successful in the industry they choose.
Pre-evaluation
The business has the opportunity to see how well the student works in a particular work
environment. A manager will also be able to see how the student adapts to change and
how quickly they pick up the new technology.
SWEEDA WORKSHOP Sedona, AZ
External Research Group, Marie Burnham
16Nov01
Motorola’s Intern/Co-op Program
Bring in fresh perspectives
Technology and innovation are dependent upon fresh ideas and creative minds. Some
of these creative minds are currently on the campuses of the colleges and universities.
The Intern/Co-op Program is a way to bring these creative minds into Motorola and
benefit from their innovative thinking.
Promote Motorola on campus
Students that have a positive work experience promote Motorola’s image and products
on campus.
SWEEDA WORKSHOP Sedona, AZ
External Research Group, Marie Burnham
16Nov01
Benefits of the Intern/ Co-op Program
To Company
 Early exposure to women and underrepresented groups
 Special projects for interns often have unexpected positive return
 Has available students who might return for expanded assignments
 Has opportunity to develop the intern for possible future employment
 Has intern as an Mbassador to share experience with other students
 Engineering Rotation Program
SWEEDA WORKSHOP Sedona, AZ
External Research Group, Marie Burnham
16Nov01
Benefits of the Intern/ Co-op Program
To Intern/Co-ops
 Gains meaningful experience which enhances education development
 Enhances ability to obtain future employment
 Obtains experience and knowledge
SWEEDA WORKSHOP Sedona, AZ
External Research Group, Marie Burnham
16Nov01
Benchmarking Data
Job Content remains the essential element among effective internship
factors. Of those who have accept or will accept employment, the top
Conclusions.
three reasons they will join the company where they intern are:
Job content; Cultural “fit”; and the Quality of management and staff.
The corresponding reason students have or decline are: Job content,
Cultural “fit”; and Compensation.
SWEEDA WORKSHOP Sedona, AZ
External Research Group, Marie Burnham
16Nov01
Intern / Coop Program Timeline
Early February
 Deadline for extension of summer intern/coop offers.
April-June
 Summer interns/coops start
Late June
 Extension of fall intern/coop offers
August through September
 Processing of returning intern/coop and returning fulltime new graduate offers
Early November
 Deadline for extension of spring intern/coop offers
SWEEDA WORKSHOP Sedona, AZ
External Research Group, Marie Burnham
16Nov01
Panel Session on IP
ISPD 2001
3/2/2001
Jeff Parkhurst
Intel Corporation
Level of Difficulty
Direct Industry/University Relationships that
require different Intellectual Property Rights
(IPR) Agreements: agreements take months
Industry
Researcher
Industry
LEGAL arm
...
4
...
2-3
3
3
•Government/Industry ERCs
4
3
2
2
2
2
1
2
•Sponsored Research Agreements
•Industrial Consortia Memberships
•Bilateral Research Agreements
•Grants
1
1
•Consulting Contracts
0
1
•Student Internships
ISPD IPR Panel
3April, 2001
•Centers or Large Collaborative Efforts
•Endowed Chairs
IPR, the Semiconductor Industry, and Universities
•
Objective of university research for industrial researcher:
1) research 2) students 3) relationship with professor(s).
•
•
Role of IPR to industrial researcher: protect the company.
Role of IPR to semiconductor companies: historically
defensive, commercialize product not make money from IPR.
•
Semiconductor companies understand IPR relationships and
how to do business with each other.
•
IPR relationship with universities is changing, infinite variety:
–IPR policy and objectives changes with each university, each
professor at each university, sometimes with students, technical
topic, and research contract type.
–Legal overhead becoming unmanageable.
–Contamination of industrial IPR hampering relationships,
research.
ISPD IPR Panel
3April, 2001
Successful Negotiation: an Industry Point-of-View
• The industrial and university researchers know how future
IPR might be related to the research and what university
background IPR might be relevant to the research absolutely necessary for negotiation.
• Industry notifies professor (and vice versa) when last
proposal from industry is sent to university Technology
Transfer. Professor checks on proposal 1-2 weeks later.
• Industry researcher has easy access to industry contracts
person or lawyer to assist with the process.
• University researcher is interested in contractual issues,
especially if the University is.
• If professor, student, or university want the future IPR, then
the professor must understand how to protect both the IPR
and the industrial collaborator over time.
ISPD IPR Panel
3April, 2001
Backup
SWEEDA WORKSHOP Sedona, AZ
External Research Group, Marie Burnham
16Nov01
Embedded System Design: Proposal
Specification
Abstract
Representation
Refinement
Compilation/Synthesis/Configuration
Architectural Implementation
Platforms
Platforms
Implementation
Embedded System
(HW/SW)
Verification
Domains
* Small aspects within
GSRC
Source: Ted Vucurevich
Chief Architect
Cadence Design Systems
DARPA University Optoelectronics
Centers
Entry of SRC and
MARCO
VLSI Today , Gigahertz Clocking (2000)
Limits to CMOS, ~100Gahertz Clocking (2015?), Gigahertz Clocking (2000)
Transition to Molecular & Quantum Devices, Densities to 1011 cm2, Clocking @ ??
Adapted from B. Leheny – 6/01
Academic R&D Sources By Discipline
Engineering
Down
40% Physics
Down
20%
Math
Down
20%
The Federal Government Must Balance Its Basic Research Portfolio to
Support the ‘Hard Science-based’ Information Technology Engine That
Produces the Annual Productivity Increases to Drive the U.S. Economy
SWEEDA
WORKSHOP
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and Whose Performance,
Cost
and
SizeSedona,
Drive
Defense Capabilities.
External Research Group, Marie Burnham
16Nov01
Approaching a “Red Brick Wall”
Challenges/Opportunities for Semiconductor R&D
Year of Production:
1999
2002
2005
2008
2011
2014
DRAM Half-Pitch [nm]:
180
130
100
70
50
35
Overlay Accuracy [nm]:
65
45
35
25
20
15
MPU Gate Length [nm]:
140
85-90
65
45
30-32
20-22
CD Control [nm]:
14
9
6
4
3
2
TOX (equivalent) [nm]:
1.9-2.5
1.5-1.9
1.0-1.5
0.8-1.2
0.6-0.8
0.5-0.6
Junction Depth [nm]:
42-70
25-43
20-33
16-26
11-19
8-13
Metal Cladding [nm]:
17
13
10
0
0
0
Inter-Metal Dielectric K:
3.5-4.0
2.7-3.5
1.6-2.2
1.5
SWEEDA WORKSHOP Sedona, AZ
External Research Group, Marie Burnham
16Nov01
<1.5
<1.5
From Ralph Cavin, SRC
SWEEDA WORKSHOP Sedona, AZ
External Research Group, Marie Burnham
16Nov01
Tech
Vectors
Emerging Technology Sequence
Defect
Tolerant
CNN
molecular
Quantum
computing
Architecture
QCA
3D
Integration
RTD-FET
Magnetic RAM
RSFQ
SET
QCA
Molecular
Logic
Phase Change
Nano FG
SET Mem
Molecular
FD SOI
Strained
Si
Vertical
TR
FinFET
From Ralph Cavin, SRC
SWEEDA WORKSHOP Sedona, AZ
External Research Group, Marie Burnham
16Nov01
Planar dbl
gate
Time
Memory
Nonclassical
CMOS
From Ralph Cavin, SRC
SWEEDA WORKSHOP Sedona, AZ
External Research Group, Marie Burnham
16Nov01