Transcript Slide 1

Digital
Fundamentals
Tenth Edition
Floyd
Flip-flops
Floyd, Digital Fundamentals, 10th ed
[email protected]
© 2008 Pearson Education
Shanghai Jiao Tong University
One-Shots
The one-shot or monostable multivibrator is a device
with only one stable state. When triggered, it goes to
its unstable state for a predetermined length of time,
+V
then returns to its stable state.
For most one-shots, the length of time
in the unstable state (tW) is determined
by an external RC circuit.
REXT
CEXT
Q
CX
RX/CX
Trigger
Q
Trigger
Q
tW
Floyd, Digital Fundamentals, 10th ed
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One-Shots
Nonretriggerable one-shots do not respond to any
triggers that occur during the unstable state.
Retriggerable one-shots respond to any trigger, even if
it occurs in the unstable state. If it occurs during the
unstable state, the state is extended by an amount
equal to the pulse width.
Retriggerable one-shot:
Trigger
Retriggers
Q
tW
Floyd, Digital Fundamentals, 10th ed
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Shanghai Jiao Tong University
One-Shots
An application for a retriggerable one-shot is a power
failure detection circuit. Triggers are derived from the
ac power source, and continue to retrigger the one
shot. In the event of a power failure, the one-shot is
not triggered and an alarm can be initiated.
Missing trigger
due to power
failure
Triggers
derived
from ac
Retriggers
Q
Retriggers
Power failure indication
tW
tW
tW
Floyd, Digital Fundamentals, 10th ed
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Shanghai Jiao Tong University
The 555 timer
Inventor: Hans Camenzind
in Signetcis, later absorbed
by Philips Semiconductors,
now NXP.
Many billions was sold.
25 Microchips that shocked the world, IEEE Spectrum, May 2009
Floyd, Digital Fundamentals, 10th ed
[email protected]
Shanghai Jiao Tong University
The 555 timer
Comparator↓
Latch↓
Positive Input
VI+
S R Q
0
0
NC
0
1
0
1
0 1
1
1 0
VINegative input
1 when VI+>VI0 when VI+<VI-
Very high input impedance.
BJT↓
b
Floyd, Digital Fundamentals, 10th ed
BJT State
c
Voltage on c
HIGH
On
Same as e
LOW
Off
Disconnected from e
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b
e
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The 555 timer
Inputs
SR Latch
Output
vthreshold
vtrigger
S
R
vo
Q1
>2/3Vcc
>1/3Vcc
0
1
LOW
On
<2/3Vcc
>1/3Vcc
0
0
No Change
No Change
<2/3Vcc
<1/3Vcc
1
0
HIGH
Off
>2/3Vcc
<1/3Vcc
1
1
HIGH
Off
Floyd, Digital Fundamentals, 10th ed
[email protected]
Shanghai Jiao Tong University
The 555 timer
The 555 timer can be configured in various ways,
including as a one-shot. A basic one shot is shown.
+VCC
(4)
(8)
R1
(7) RESET
VCC
DISCH
(6)
(2)
C1
(3)
THRES
OUT
TRIG
CONT
GND
(5)
(1)
(1) Initially, a static HIHG on Trigger results
in a static LOW on the output.
Floyd, Digital Fundamentals, 10th ed
[email protected]
Shanghai Jiao Tong University
The 555 timer as one shot
(2) When a negative going
pulse appears, comparator B
output a HIGH, setting Q and
turning off Q1. Then C1 will
start to charge.
Floyd, Digital Fundamentals, 10th ed
[email protected]
Shanghai Jiao Tong University
The 555 timer as one shot
(3) After sometime,
comparator A output a
HIGH, resetting Q and
the circuit returns to
steady state
Floyd, Digital Fundamentals, 10th ed
[email protected]
Shanghai Jiao Tong University
The 555 timer as one shot
The 555 timer can be configured in various ways,
including as a one-shot. A basic one shot is shown. The
pulse width is determined by R1C1 and is approximately
+V
tW = 1.1R1C1.
CC
(4)
(8)
R1
(7) RESET
VCC
DISCH
The trigger is a
negative-going
pulse.
(6)
(2)
(3)
THRES
OUT
TRIG
CONT
GND
C1
(5)
tW = 1.1R1C1
(1)
V(t)=VCC [1-exp(-t/RC)]
Floyd, Digital Fundamentals, 10th ed
[email protected]
Shanghai Jiao Tong University
The 555 timer as one shot
Determine the pulse width for the circuit shown.
tW = 1.1R1C1 = 1.1(10 kW)(2.2 mF) = 24.2 ms
+VCC
+15 V
(4)
R1
10 kW
(7) RESET
(8)
VCC
DISCH
(6)
(2)
C1
OUT
TRIG
CONT
GND
2.2 mF
Floyd, Digital Fundamentals, 10th ed
(3)
THRES
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(5)
tW = 1.1R1C1
(1)
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The 555 timer
The 555 can be configured as a basic astable multivibrator
with the circuit shown.
Floyd, Digital Fundamentals, 10th ed
[email protected]
Shanghai Jiao Tong University
The 555 timer as an astable multivibrator
The 555 can be configured as a basic astable multivibrator
with the circuit shown.
Floyd, Digital Fundamentals, 10th ed
[email protected]
Shanghai Jiao Tong University
The 555 timer
The 555 can be configured as a basic astable multivibrator
with the circuit shown. In this circuit C1 charges through
R1 and R2 and discharges through only R2. The output
+V
frequency is given by:
CC
f 
1.44
 R1  2R2  C1
(4)
R1
(7)
The frequency and duty cycle
are set by these components.
R2
(6)
(2)
C1
(8)
RESET
DISCH
VCC
THRES
OUT
TRIG
CONT
GND
(3)
(5)
(1)
Floyd, Digital Fundamentals, 10th ed
[email protected]
Shanghai Jiao Tong University
The 555 timer
Given the components, you can read the frequency from
the chart. Alternatively, you can use the chart to pick
components for a desired frequency.
+VCC
100
10
(7)
1.0
1
kW
W
R2
0.1
(6)
(2)
0.01
0.001
0.1
(8)
RESET
DISCH
VCC
THRES
OUT
kW
10
0k
10
W
MW
1M
10
C1 (mF)
(4)
R1
C1
TRIG
CONT
GND
(3)
(5)
(1)
1.0
10
100
1.0k
10k
100k
f (Hz)
Floyd, Digital Fundamentals, 10th ed
[email protected]
Shanghai Jiao Tong University
Homework
• pp.410
– 28, 30
Floyd, Digital Fundamentals, 10th ed
[email protected]
Shanghai Jiao Tong University
Floyd, Digital Fundamentals, 10th ed
[email protected]
Shanghai Jiao Tong University
Selected Key Terms
Latch A bistable digital circuit used for storing a bit.
Bistable Having two stable states. Latches and flip-flops are
bistable multivibrators.
Clock A triggering input of a flip-flop.
D flip-flop A type of bistable multivibrator in which the output
assumes the state of the D input on the triggering
edge of a clock pulse.
J-K flip-flop A type of flip-flop that can operate in the SET,
RESET, no-change, and toggle modes.
Floyd, Digital Fundamentals, 10th ed
[email protected]
Shanghai Jiao Tong University
Selected Key Terms
Propagation The interval of time required after an input signal
delay time has been applied for the resulting output signal to
change.
Set-up time The time interval required for the input levels to be
on a digital circuit.
Hold time The time interval required for the input levels to
remain steady to a flip-flop after the triggering
edge in order to reliably activate the device.
Timer A circuit that can be used as a one-shot or as an
oscillator.
Floyd, Digital Fundamentals, 10th ed
[email protected]
Shanghai Jiao Tong University
1. The output of a D latch will not change if
a. the output is LOW
b. Enable is not active
c. D is LOW
d. all of the above
Floyd, Digital Fundamentals, 10th ed
[email protected]
Shanghai Jiao Tong University
© 2008 Pearson Education
2. The D flip-flop shown will
D
a. set on the next clock pulse
b. reset on the next clock pulse
c. latch on the next clock pulse
CLK
Q
CLK
Q
d. toggle on the next clock pulse
Floyd, Digital Fundamentals, 10th ed
[email protected]
Shanghai Jiao Tong University
© 2008 Pearson Education
3. For the J-K flip-flop shown, the number of inputs that
are asynchronous is
PRE
a. 1
b. 2
Q
J
c. 3
CLK
d. 4
Q
K
CLR
Floyd, Digital Fundamentals, 10th ed
[email protected]
Shanghai Jiao Tong University
© 2008 Pearson Education
4. Assume the output is initially HIGH on a leading edge
triggered J-K flip flop. For the inputs shown, the output
will go from HIGH to LOW on which clock pulse?
a. 1
b. 2
c. 3
d. 4
Floyd, Digital Fundamentals, 10th ed
CLK
J
K
1
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2
3
4
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© 2008 Pearson Education
5. The time interval illustrated is called
a. tPHL
b. tPLH
50% point on triggering edge
CLK
c. set-up time
d. hold time
Q
50% point on LOW-toHIGH transition of Q
?
Floyd, Digital Fundamentals, 10th ed
[email protected]
Shanghai Jiao Tong University
© 2008 Pearson Education
6. The time interval illustrated is called
a. tPHL
b. tPLH
c. set-up time
D
CLK
d. hold time
Floyd, Digital Fundamentals, 10th ed
?
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© 2008 Pearson Education
7. The application illustrated is a
a. astable multivibrator
HIGH
HIGH
b. data storage device
QA
J
c. frequency multiplier
d. frequency divider
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fin
CLK
K
QB
J
fout
CLK
K
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© 2008 Pearson Education
Output
lines
Q0
D
8. The application illustrated is a
C
a. astable multivibrator
R
Q1
D
b. data storage device
C
R
c. frequency multiplier
Q2
D
d. frequency divider
C
Parallel data
input lines
R
Q3
D
Clock
C
R
Clear
Floyd, Digital Fundamentals, 10th ed
[email protected]
Shanghai Jiao Tong University
© 2008 Pearson Education
9. A retriggerable one-shot with an active HIGH output has
a pulse width of 20 ms and is triggered from a 60 Hz line.
The output will be a
a. series of 16.7 ms pulses
b. series of 20 ms pulses
c. constant LOW
d. constant HIGH
Floyd, Digital Fundamentals, 10th ed
[email protected]
Shanghai Jiao Tong University
© 2008 Pearson Education
10. The circuit illustrated is a
+VCC
a. astable multivibrator
b. monostable multivibrator
c. frequency multiplier
d. frequency divider
(4)
R1
(7)
R2
(6)
(2)
C1
(8)
RESET
DISCH
VCC
THRES
OUT
TRIG
CONT
GND
(3)
(5)
(1)
Floyd, Digital Fundamentals, 10th ed
[email protected]
Shanghai Jiao Tong University
© 2008 Pearson Education
Answers:
Floyd, Digital Fundamentals, 10th ed
1. b
6. d
2. d
7. d
3. b
8. b
4. c
9. d
5. b
10. a
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