Transcript Slide 1

Introduction to Computer
Organization and Architecture
Lecture 2
By Juthawut
Chantharamalee
http://dusithost.dusit.ac.th/~juthawut_cha/
home.htm
Outline
Information representation
 Arithmetic operations (addition and subtraction)
 Instruction Formats
 Addressing Modes
 Assembly Language Programming
 Basic input/output operations
 Subroutine linkage

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Integer non-Negative Number Representation
n1
V (B)  bn  2  bn1  2
n
 ...  b0  2 ;
0
B  bnbn1...b0 ; bi 0,1
The most significant bit
The least significant bit
V  Z
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Decimal-to-Binary Conversion
B  bnbn1...b0 ; bi 0,1
V  Z
V is divided by 2  the reminder is the least significant bit of B
bnbn-1…b1b0
The quotient is again divided by 2  the reminder is the next bit of B
bnbn-1…b1b0
…
The process is repeated up to and including the step in which the
quotient becomes 0:
bnbn-1…b1b0
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Real non-Negative Number Representation
B  bnbn 1...b0 b1b2 ...b m ; bi  0,1
integer part
fraction part
V ( B)  bn  2n  bn 1  2n 1  ...  b0  20 
integer part
 b1  21  bn  2  22  ...  b m  2 m ;
fraction part
V R

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Decimal-to-Binary Conversion
V  R
B  bnbn 1...b0 b1b2 ...b m ; bi  0,1
integer part
fraction part
To convert a fixed-point decimal number into binary, the integer and
fraction parts are handled separately.
•The integer part is converted as the integer number
•The fractional part is converted by multiplying it and then fractional
parts of its products by 2:
•The part of the product to the left of the decimal point, which is either 0
or 1, is a bit in the binary representation.
•The first bit generated is the bit immediately to the right of the binary
point.
•The next bit generated is the second bit to the right, and so on
•The process is repeated until the required accuracy is attained
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Convert
( 927.45 ) 10
927
1
-------2 - = 463 + --2-
1 LSB
463
1
-------2 - = 231 + --2-
1
231
1
-------2 - = 115 + --2-
1
115
1-------2 - = 57 + -2
1
57
------ = 28 + 1
--2
2
28
------ = 14 + 0
--2
2
1
0
0
14
----2- = 7 + --2-
0
7
--2- = 3 + 1
--2-
1
3
--- = 1 + 1
--2
2
1
--- = 0 + 1
-22
1
1 MSB
0.45  2 = 0.90
0 MSB
0.90  2 = 1.80
1
0.80  2 = 1.60
1
0.60  2 = 1.20
1
0.20  2 = 0.40
0
0.40  2 = 0.80
0
0.80  2 = 1.60
1 LSB
( 927.45 ) 10 = ( 1110011111.0111001
 )2
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Signed Numbers Representation
V (B)  bn1  2n1  bn2  2n2  ...  b0  20 ; bi 0,1; i 0,1,..., n 1
V  Z  : 0  V  2n  1
The leftmost bit bn-1 is the sign bit:
0 for positive numbers and 1 for negative numbers
•Positive values have identical representation
•Negative values have different representation
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Signed Numbers Representation
Sign-and-magnitude representation (negative values
are represented by changing the most significant bit):
+5 = 0101
-5 = 1101
1’s-complement representation (negative values are obtained by
complementing each bit of the corresponding positive number):
+5 = 0101
-5 = 1010
V '1  (2n 1)  V
2’s-complement representation (negative values are obtained by
subtracting the corresponding positive number from 2n):
V '2  (2n )  V  V '1  1
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Signed Numbers Representation
b 3 b 2 b1 b 0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
0
0
1
1
0
0
0
0
1
1
0
0
1
1
1
0
1
0
1
0
1
0
0
1
0
1
0
1
0
1
Sign and
magnitude
1's complement
+7
+6
+5
+4
+3
+2
+1
+0
- 0
- 1
- 2
- 3
- 4
- 5
- 6
- 7
+7
+6
+5
+4
+3
+2
+1
+0
-7
-6
-5
-4
-3
-2
- 1
-0
2's complement
Introduction to Computer Organization and Architecture
+
+
+
+
+
+
+
+
-
7
6
5
4
3
2
1
0
8
7
6
5
4
3
2
1
10
Addition of Positive Numbers
0
+
0
0
1
+
0
1
0
+
1
1
+
1
1
10
Carry-out
Figure 2.2. Addition of 1-bit numbers.
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S/M and 1’s-Complement Representation
Since we can’t perform addition and subtraction
in the same manner, development of special
circuitry for subtraction is needed
 1’s-Complement Representation does not allow
a universal representation of 0: there are +0 and
-0 that become formally different values

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2’s Complement Conversion to Decimal
• Positive Numbers: Just ignore the 0, repeat the process
studied earlier.
• For negative numbers: Example 1101
• Discard the 1 which represents the sign: 101
• Subtract 1
101
-001
100
• Complement 100=>011
• Obtain decimal value (011)B=3D
• Remember is a negative value 1101 = -3
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Decimal Conversion to 2’s Complement
Positive Numbers
• Find signed representation
Negative numbers
• Subtract number from 2n
• Find signed representation
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Addition of 2’s-Complement Numbers

To add two numbers, add their n-bit representations,
ignoring the carry-out signal from the most significant
bit (MSB) position.
Note: The sum will be correct in the 2’s complement representation as
long as the answer is in the range -2n-1 through 2n-1-1
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Subtraction of 2’s-Complement Numbers

To subtract two numbers X and Y, that is, to perform
X-Y, form the 2’s-complement of Y and then add it to
X according to the addition rule.
Note: The result will be correct in the 2’s complement
representation as long as the answer is in the range -2n-1 through
2n-1-1
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2’s Complement System
N - 1
N - 2
0
0000
1111
1
1110
2
1101
- 2
- 3
-1
0
+1
0010
+ 2
+ 3
- 4
1100
1011
- 5
- 6
1010
0011
+ 4
- 7 - 8
1001
(a) Circle representation of integers mod N
0001
+ 7
+ 5
+ 6
0100
0101
0110
0111
1000
(b) Mod 16 system for 2's-complement numbers
Figure 2.3. Modular number systems and the 2's-complement system.
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Addition of 2’s-Complement Numbers
0000
1111
1110
1101
-2
-1
0
0001
+1
-3
0010
+2
-4
1100
1011
0011
+3
+4
-5
+5
-6
1010
1001
-7
-8
1000
3+2=5; 3’2=0011; 2’2=0010
3| 0011
+7
0100
0101
+6
0110
0111
Good method as long as the
results is less than 2(N-1)-1
+ 2| +0010
5| 0 0101
Carry-out bit is ignored to obtain the correct result
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Addition of 2’s-Complement Numbers
0000
1111
1110
1101
-2
-1
0
0001
+1
-3
0010
+2
-4
1100
1011
0011
+3
+4
-5
+5
-6
1010
1001
-7
-8
1000
+7
0100
0101
+6
0110
0111
7-3=4; 7’2=0111; -3’2=1101 (if this were an unsigned number 1101=13)
7 | 0111
+(-3)| +1101 (8 -3= 5=> 1 101)
4| 10100
Carry-out bit is ignored to obtain the correct result
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2’s-Complement Addition

The 2’s-Complement System is the most
efficient for addition and subtraction of signed
numbers because both can be performed in the
same manner for both positive and negative
numbers

Same manner=Same circuitry=Less $$$$
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Overflow in Integer Arithmetic



In the 2’s-complement system n bits can represent the
values in the range 2n1  V  2n1  1
For example: n  4; - 8  V  7
When the result of an arithmetic operation is outside this
range, an arithmetic overflow has occurred
6| 0110
-7| 1001
5| +0101
+( -1)| -0001
11|= 1011
overflow
1001

1111
-8|=11000
no overflow
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Overflow in Integer Arithmetic

Overflow can occur only when adding two numbers
that have the same sign

The carry-out signal from the sign-bit position is not a
sufficient indicator of overflow when adding signed
numbers
A simple way to detect overflow is to examine the signs
of the two summands (X and Y ) and the sign of the
result S (S=X+Y).
When both operands X and Y have the same sign, an
overflow occurs if the sign of sum S is not the same as
the signs of X and Y.


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2’s-Complement Addition and Subtraction
(a)
(c)
(e)
0010
+ 0011
0101
1011
+ 1110
1001
1101
- 1001
(f)
(g)
(h)
(i)
(j)
-
0010
0100
0110
0011
1001
1011
1001
0001
0010
1101
( + 2)
( + 3)
( + 5)
(- 5 )
( - 2)
( - 7)
(- 3 )
(- 7 )
( + 2)
( + 4)
( + 6)
( + 3)
( - 7)
( - 5)
(- 7 )
( + 1)
( + 2)
( - 3)
(b)
(d)
0100
+ 1010
1110
0111
+ 1101
0100
1101
+ 0111
0100
0010
+ 1100
1110
0110
+ 1101
0011
1001
+ 0101
1110
1001
+ 1111
1000
0010
+ 0011
0101
Introduction to Computer Organization and Architecture
( + 4)
(- 6 )
(- 2 )
( + 7)
( - 3)
( + 4)
( + 4)
( - 2)
( + 3)
( - 2)
( - 8)
( + 5)
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Comparison of Signed Representations
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Character Representation
Each character is encoded by 8 bits
 American Standards Committee on Information
Interchange (ASCII) encoding system – 7 bits
encoding
 The 8th (most significant) bit is used to encode
characters from different alphabets and some
extra special symbols

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Binary Coded Decimal (BCD)
•Encoding of decimal digits
Decimal digit
BCD code
0
1
2
3
4
5
6
7
8
9
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
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Hexadecimal Numbers

Base 16 ={0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F}

(Z3Z2Z1Z0)H=
(Z3x 163)+(Z3x 162)+(Z3x 161)+(Z3x 160)=
(Z3x4096)+(Z3x 256)+(Z3x 16)+(Z3x 1)

Example: (A34E)H=
(A x 163)+(3 x 162)+(4 x 161)+(E x 160)=
(Ax4096)+(3x 256)+(4x 16)+(E x 1)=
(10x4096)+(3x 256)+(4x 16)+(14 x 1)=
40960+768+64+14=41806.
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Hexadecimal Numbers Advantages


Easier to represent large numbers in compact manner
Close relationship to binary numbers
Ex.: Find the binary representation of 110101101011101
110
1011
0101
1101
6D=6H
11D=BH
5D=5H
13D=CH
(110101101011101)B=(6B5C)H
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Conversion Hexadecimal-Decimal

Hexadecimal to Decimal: As shown on previous slide

Decimal to HEX: Same process as with binary.
Example: (1574)D=(?)H
1974 / 16 = 123 rem 6
123 / 16 = 7 rem 11
Hence (1574)D=(7B6)H
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Table of ASCII Characters
Char
Hex
Char
Hex
Char
Hex
Char
Hex
(nul)
(soh)
(eot)
(enq)
(ack)
(bel)
(bs)
(ht)
(nl)
(vt)
(cr)
(so)
(si)
(dle)
(dc1)
(dc2)
(dc3)
(dc4)
(nak)
(syn)
(etb)
(can)
(em)
(sub)
(fs)
(gs)
(rs)
(us)
0x00
0x01
0x04
0x05
0x06
0x07
0x08
0x09
0x0a
0x0b
0x0d
0x0e
0x0f
0x10
0x11
0x12
0x13
0x14
0x15
0x16
0x17
0x18
0x19
0x1a
0x1c
0x1d
0x1e
0x1f
(sp)
!
$
%
&
'
(
)
*
+
.
/
0
1
2
3
4
5
6
7
8
9
:
<
=
>
?
0x20
0x21
0x24
0x25
0x26
0x27
0x28
0x29
0x2a
0x2b
0x2d
0x2e
0x2f
0x30
0x31
0x32
0x33
0x34
0x35
0x36
0x37
0x38
0x39
0x3a
0x3c
0x3d
0x3e
0x3f
@
A
D
E
F
G
H
I
J
K
M
N
O
P
Q
R
S
T
U
V
W
X
Y
Z
\
]
^
_
0x40
0x41
0x44
0x45
0x46
0x47
0x48
0x49
0x4a
0x4b
0x4d
0x4e
0x4f
0x50
0x51
0x52
0x53
0x54
0x55
0x56
0x57
0x58
0x59
0x5a
0x5c
0x5d
0x5e
0x5f
`
a
d
e
f
g
h
i
j
k
m
n
o
p
q
r
s
t
u
v
w
x
y
z
|
}
~
(del)
0x60
0x61
0x64
0x65
0x66
0x67
0x68
0x69
0x6a
0x6b
0x6d
0x6e
0x6f
0x70
0x71
0x72
0x73
0x74
0x75
0x76
0x77
0x78
0x79
0x7a
0x7c
0x7d
0x7e
0x7f
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Minimum Number of Bits

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Memory
……………….
Cells
Each cell can store 1 bit of information having the value 0 or 1
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Memory
0
…
n-1
…
Word is a group of n bits
n is called the word length
Modern computers have word length that typically
range from 16 to 64 bits
As a rule, the word length is a power of 2: 16, 32 or
64 bits
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Memory
0
…
7
…
Byte is a unit of 8 bits
Word typically consists of 2 or 4 bytes
(2 bytes for the IBM PC)
Bits are seldom addressable individually
Bytes have addresses that are used for accessing the
memory to store or retrieve a single item of
information
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Byte Addressability
Successive byte locations in the memory have
successive addresses
Memory is byte-addressable
Thus, successive byte locations have addresses
0, 1, 2, 3, 4,…
If the word length of the machine is 32 bits,
successive words are located at the aligned
addresses 0, 4, 8, 12, …
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Memory
n bits
first word (0)
second word (4)
•
•
•
i th word
•
•
•
last word
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Encoded Information
•
•
•
32 bits
b31 b30
b1 b0
Sign bit:b31= 0 for positive numbers
b31= 1 for negative numbers
(a) A signed integer
8 bits
ASCII
character
8 bits
8 bits
ASCII
character
ASCII
character
8 bits
ASCII
character
(b) Four characters
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Memory
Usually numbers from 0 through 2k-1 for some
suitable value of k are used as the addresses of
successive locations (bytes) in the memory
The 2k addresses constitutes the address space
of the computer, and the memory has up to 2k
addressable locations
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Example

k=3 then we can access 23=8 different addresses:
Binary Decimal
000
0
001
1
010
2
011
3
100
4
101
5
110
6
111
7
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Memory Units
1K (Kbyte) = 210 (1,024) bytes
1M (Mbyte) = 220 (1,048,576) bytes = 1,024 K
1G (Gbyte) = 230 bytes = 1,024 M
1T (Tera) = 240 bytes = 1,024 G
Example: 32-bit address generates an address space of
232 bytes =22 x 230= 4 x 1 G = 4 (Gigabytes)
Example: 24-bit address generates an address space of
224 =24 x 220bytes = 16 x 1M= 16 M (Megabytes)
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Memory Units
What if we want to address 3,000,000 bytes?
log(3,000,000) 6.5
log2 (3,000,000
)

 21.66
log(2)
.3
222 bytes =22 x 220= 4 x 1 M = 4 M > 3,000,000 bytes
221 bytes =21 x 220= 2 x 1 M = 2 M < 3,000,000 bytes
Not enough addresses!
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Addresses Assignment

Big-endian assignment: lower byte addresses
are used for the more significant (the leftmost)
bytes of the words

Little-endian assignment: lower byte addresses
are used for the less significant (the rightmost)
bytes of the words
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Addresses Assignment
Word
address
Byte address
Byte address
0
0
1
2
3
0
3
2
1
0
4
4
5
6
7
4
7
6
5
4
•
•
•
k
2 -4
k
2 -4
k
2 -3
•
•
•
k
2- 2
k
2 - 1
(a) Big-endian assignment
k
2 - 4
k
2- 1
k
2 - 2
k
2 -3
k
2 -4
(b) Little-endian assignment
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Debug
Characteristics:
•Is program provided by DOS
•Used for testing and debug executable programs
•Displays all program code and data in hexadecimal
•Allows to execute programs step by step
•Does not distinguish between lowercase and upper case
Commands:
•D Display the contents of an area in memory
•E Enter data into memory
•Q Quit session
•R Display the contents of one or more registers
•T Trace the execution of one instruction
•W Write program onto disk
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Debug Display
Hex
Address
Hex
Representation
ASCII
Representation
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Debug Display
System Equipment
same
(54)16=“T”
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Debug Display
Memory Size
LittleEndian
Byte
Swap
Decimal
80 02
02 80
640 k
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Debug Display
Model ID
FC = PC-AT
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Machine Instructions
A computer must have instructions capable of
performing four types of operations:





Data transfers between the memory and the
processor registers
Arithmetic and logic operations on data
Program sequencing and control
Input/Output (I/O) transfers
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Data Transfers: Possible Locations
Memory locations
 Processor registers
 Registers in the I/O subsystem
 In the instruction itself (immediate data)

Most of the time we identify a location by a symbolic
name standing for its hardware binary address:
•Memory Locations: LOCA, LOC, PLACE, A, VAR2, JOHN_SMITH
•Processor register names: R0, R5, R10, …
•I/O register names: DATAIN, OUTSTATUS
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Data Transfers: Register Transfer Notation
The contents of a location are denoted by placing square
brackets around the name of the location:
[LOC] means the contents of the location LOC
R1  [LOC] means that the contents of memory location
LOC are transferred into processor register R1
R3  [R1]+[R2] means that the sum of the contents of
registers R1 and R2 is transferred into processor register R3
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Data Transfers: Assembly Language Notation
Move LOC, R1
means that the contents of memory location LOC are
transferred into processor register R1
This is equivalent to R1<- [LOC] in Register Transfer
Notation
In the IBM PC the instruction MOV is equivalent to Move
(more about this later)!
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Data Transfers: Assembly Language Notation
Move Source, Destination
means that the contents of memory location Source are
transferred into memory location Destination.
As a result, the previous contents of memory location
Destination will be replaced, but the contents of memory
location Source will not be changed
The instruction Move copies the contents of one memory
location to another one
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What is “Standard” Assembly?
Book:
IBM PC Assembly
•”Standard” Assembly
•Real-life Assembly
Language
•Format
OPcode src, dst
Language
•Format
OPcode dst, src
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MOV Instruction
Remember that the IBM PC assumes that you are talking about the contents
of a variable (Move), not its memory address (), hence, if:
X is a variable with memory address 10H and its contents are 24H
1)The instruction: MOV AX,X moves 24H into AX
2) The instruction MOV AX,[X] moves 87H into AX
Address:
10H
24
87
Introduction to Computer Organization and Architecture
Address:
24H
55
Basic Instruction Types
C=A+B
How is this high-level language command
implemented in the computer?
To carry out the action
C  [A]+[B]
the contents of memory locations A and B are fetched
from memory and transferred into the processor, where
their sum is computed and then transferred to memory
location C
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Three-Address Instruction
General form: Operation Source1, Source2, Destination
Add A, B, C
Disadvantage: This form has 3 operands. If memory
addresses were to be used to specify operands, the
memory space would be very limited.
Example: if k=10 bits (enough for a memory of 1 KB), then
30 bits will be needed for the 3 operands.
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Two-Address Instruction
General form: Operation Source, Destination
An Add instruction: Add A, B performs the operation
B[A]+[B]. When the sum is calculated, the result is sent
to memory and stored in location B, replacing the original
contents of this location.
C  [A]+[B] can be implemented as
Move B, C
Add A, C
Even a 2-address instruction is too large for a processor
with a 32-bit address space !
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One-Address Instruction
General form: Operation Source
Examples:
Add A means: Add the contents of memory location A to
the contents of the accumulator register and place the sum
back into the accumulator
Move A means: Copy the contents of memory location A
to the accumulator register
Store A means: Copy the contents of the accumulator
register to memory location A
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One-Address Instruction
Thus, C  [A]+[B] can be implemented as
(Assembly Language)
Move A
Add B
Store C
Notice that now the 32-bits
will be use only to access 1
memory location and to
denote the operation
which means (Register Notation):
Accumulator  [A]
Accumulator  [Accumulator] + [B]
C  [Accumulator]
A two-operand instruction, how is it possible?
One Register, One memory location
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One-Address Instruction
In the IBM PC, C  [A]+[B] can be implemented as
;Assembly Language Register Notation
MOV AX,A
; [AX]  [A]
ADD AX,B
; [AX]  [AX] + [B]
MOV C,AX
; [C] [ AX]
Notice that in the IBM PC Assembly Language the operation
“addition” is represented by the instruction “ADD”.
The symbol “;” is used to indicate the start of comments.
Comments are useful to remind us what the program is doing,
but they do NOT effect the behavior of it
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Processor Registers



Because the number of registers is relatively small,
only a few bits are needed to specify, which register
takes part in an operation
For example, for 32 registers only 5 bits are needed
to address them (while 8 bits are needed to address a
single byte in the memory)
This makes it possible to use “two”- and “three”address instructions
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Using Processor Registers for Arithmetic Operations
C=A+B that is, C  [A]+[B] can be implemented as
Move
Move
Add
Move
A, Ri
B, Rj
Ri, Rj
Rj, C
4 instructions
If we wanted to do it in this manner, for the IBM PC we
would have:
MOV
MOV
ADD
MOV
DX,A
AX,B
AX,DX
C,AX
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If One of the Arithmetic Operands is in Memory
C=A+B that is, C  [A]+[B] can be implemented as
Move A, Ri
Add B, Ri
Move Ri, C
3 instructions
For the IBM PC we would have:
MOV AX,A
ADD AX,B
MOV C,AX
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Addressing Modes
Name
Assembler syntax
Addressing function
Immediate
Register
#Value
Ri
Operand = Value
EA = Ri
Absolute (Direct)
LOC
EA = LOC
Indirect
(Ri )
(LOC)
X(R i)
EA = [Ri ]
EA = [LOC]
EA = [Ri ] + X
Base with index
Base with index
and offset
(Ri ,Rj )
X(R i,Rj )
EA = [Ri ] + [Rj ]
EA = [Ri ] + [Rj ] + X
Relative
X(PC)
EA = [PC] + X
Autoincrement
(Ri )+
EA = [Ri ] ;
Increment Ri
Autodecrement
 (Ri )
Decrement Ri ;
EA = [Ri]
Index
EA = Effective address
Value = a signed number
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Program Sequencing and Control

Programs aren’t all “in-line”, they also need to:






Use call and branch instructions
Can be conditional


jump to and from subroutines
loop
branch to exception vectors
etc
Branch > 0 LOOP
Control instruction examples

cache control, pipeline control, RFI, WFI
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Specific Machine Levels
High-Level Language
Level 5
Assembly Language
Level 4
Operating System
Level 3
Instruction Set
Architecture
Level 2
Microarchitecture
Level 1
Digital Logic
Level 0
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Translating Languages
English: Display the sum of A times B plus C.
C++: cout << (A * B + C);
Assembly Language:
mov eax,A
mul B
add eax,C
call WriteInt
Intel Machine Language:
A1 00000000
F7 25 00000004
03 05 00000008
E8 00500000
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Assembly Language
Mnemonics, symbolic names, and rules for their
use for a specific computer type
 For example:





Operation: MOV, ADD, INC, BR
Register or Memory: R2 or LOC
Syntax: ADDI 5,R3
Viable programming language(s)


Very good control of the machine
Albeit cumbersome!
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Assembly Language
No standard format
 Assembly language is converted into machine
instructions (1’s and 0’s) by a program called an
Assembler
 Assembler Directives provide other information
to the assembler




where to place instructions
where to put data
constant values
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Assembly Language Example
Memory
address
label
Assembler directives SUM
N
NUM1
Statements that
generate
machine
instructions
Assembler directives
START
LOOP
Operation
EQU
ORIGIN
DATAWORD
RESERVE
ORIGIN
MOVE
MOVE
CLR
ADD
ADD
DEC
BGTZ
MOVE
RETURN
END
Addressing
or data
information
200
204
100
400
100
N,R1
#NUM1,R2
R0
(R2),R0
#4,R2
R1
LOOP
R0,SUM
START
LOOP
SUM
N
100
104
Move
Move
N,R1
#NUM1,R2
108
112
116
Clear
Add
Add
R0
(R2),R0
#4,R2
120
124
128
132
Decrement R1
Branch>0 LOOP
Move
R0,SUM
200
204
100
NUM1 208
NUM2 212
NUMn
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Basic I/O
Bus
Processor
DATAIN
DATAOUT
SIN
SOUT
Keyboard
READWAIT
Testbit
#3,INSTATUS
Branch=0 READWAIT
MoveByte DATAIN,R1
Display
WRITEWAIT
Testbit
#3,OUTSTATUS
Branch=0 WRITEWAIT
MoveByte R1,DATAOUT
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Queues / FIFOs

First In — First Out

Buffer data between two entities:




Scheduling as well:




Keyboard => Processor
Processor => Printer
Processor1 => Processor2
Printer queue
Queue of processes for multi-tasking
Event queue in VerilogHDL
Queues may use priority ranking
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Queues / FIFOs

First In — First Out

The two basic functions are:




Frequently, one entity appends items to the queue
and another removes it
Two moving pointers are needed:



APPEND an element on one end
REMOVE an element from the other
IN: location for next APPEND
OUT: location for next REMOVE
Wrap-around is needed
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Queues / FIFOs
Pointers usually
managed by hardware
 Overflow occurs when
an element is appended
to a full queue
 Underflow occurs when
an element is removed
from an empty queue
 May have Empty,
Almost Full, Full flags

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Stacks/LIFOs

Last In — First Out


Stacks are used to temporarily store items
The two basic functions are:




PUSH an element on the top
POP the top element from the stack
Frequently, the same entity that pushed the item on
stack also pops it
In contrast to the queue



Only one pointer needed – it points to the top element
PUSH and POP in different directions
Wrap-around is not needed
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Stacks/LIFOs

Processor Stack




Dedicated Stack Pointer (SP)
SP may be a general-purpose register
SP “grows” towards smaller addresses
Implementation of stack operations:
PUSH: Move NewItem, -(SP)
SP <- [SP] - 1, [SP] <- NewItem
POP: Move (SP)+,TopItem
TopItem <- [[SP]]; SP <- [SP] + 1
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Subroutines

Program segments may occur repeatedly:
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Subroutines

Solution: Call a subroutine multiple times

Problems:



Return address needs to be known!
How to pass parameters?
Where to keep local variables?
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Subroutine Calling


Link register:

Call SUB

Return
LR <- [PC]
PC <- SUB
PC <- [LR]
Address on stack:

Call SUB

Return
SP <- [SP] – 1
[SP] <- [PC]
PC <- SUB
PC <- [[SP]]
SP <- [SP] + 1
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Parameter Passing
Stored in a designated memory area:
MAIN
Move
parX, A
Move
parY, B
Call
Move
AddSub
Move
A, R0
Add
B, R0
AddSub
Move
R0, C
C, Result
Return
Stored in designated registers:
MAIN
Move
parX, R0
Move
Call
Move
R0, R2
parY, R1
Add
R1, R2
AddSub
Return
Move
R2, Result
Move
parX, -(SP)
Move
parY, -(SP)
AddSub
Using the stack:
MAIN
Call
Move
AddSub
AddSub
?
…
Return
?, Result
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Parameter Passing through Stack
Simple Example Re-Using Parameter Space:
MAIN
SUBR
Move
PARAM1, -(SP)
; push Param1
Move
PARAM2, -(SP)
; push Param2
Call
SUBR
; call subroutine
Move
(SP), RESULT
; get return value
Add
#8, SP
; clean up stack
Move
8(SP), R0
; load Param 1
Add
4(SP), R0
; add Param 2
Move
R0, 4(SP)
; store result
Return
; Result = P1 + P2
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Parameter Addressing

Remember that Return Address in on the Stack
Too:

Assumptions:

two 32-bit parameters, no temporary items on stack, result
size is 32-bit, result replaces parameter
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Subroutine Linkage
Call instruction is
used to call a
subroutine
 Subroutine returns
control to the
calling program
when it is done
 Stack is used to
pass information

Memory
location Calling program
200
204
Call
SUB
next instruction
Memory
location
1000
Subroutine SUB
first instruction
Return
1000
PC
204
Link
204
Call
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Return
84
Subroutine Linkage



Call pushes
information onto
stack
Return pops
information off of
stack
Stack pointer (SP)
and Frame pointer
(FP) used to
access parameters
and variables
SP
(stack pointer)
saved [R1]
saved [R0]
localvar3
localvar2
localvar1
FP
(frame pointer)
saved [FP]
Return address
Stack
frame
for
called
subroutine
param1
param2
param3
param4
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(top-of-stack)
85
The End
Lecture 2