Transcript Chapter 3

Chapter 3
Boolean Algebra and
Combinational Logic
1
Chapter 3 Homework
3.2a, 3.3a, 3.5, 3.7, 3.11h, 1.13,
3.19, 3.21a&f, 3.23b, 3.35, 3.43,
3.45, 3.47, 3.63
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Logic Gate Network
• Two or more logic gates connected
together.
• Described by truth table, logic diagram, or
Boolean expression.
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Logic Gate Network
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Boolean Expression for Logic
Gate Network
• Similar to finding the expression for a
single gate.
• Inputs may be compound expressions
that represent outputs from previous
gates.
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Boolean Expression for Logic
Gate Network
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Boolean Expression for Logic
Gate Network
=
+
+
+
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Bubble-to-Bubble Convention
• Choose gate symbols so that outputs with
bubbles connect to inputs with bubbles.
• Results in a cleaner notation and a clearer
idea of the circuit function.
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Bubble-to-Bubble
Convention – Step 1
• Start at the output and work towards the
input.
• Select the OR gate as the last gate for
an SOP solution.
• Select the AND gate as the last gate for
an POS solution.
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Bubble-to-Bubble
Convention – Step 2
• Choose the active level of the output if
necessary.
• Go back to the circuits inputs to the next
level of gating.
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Bubble-to-Bubble
Convention – Step 3
• Match the output of these gates to the
input of the final gate. This may require
converting the gate to its DeMorgan’s
equivalent.
• Repeat Step 2 until you reach the
circuits.
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Bubble-to-Bubble
Convention – Step 3
=
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Bubble-to-Bubble
Convention – Step 3
=
Y=
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Order of Precedence
• Unless otherwise specified, in Boolean
expressions AND functions are performed
first, followed by ORs.
• To change the order of precedence, use
parentheses.
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Order of Precedence
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+
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+
+
+ +
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Simplification by Double
Inversion
• When two bubbles touch, they cancel
out.
• In Boolean expressions, bars of the
same length cancel.
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Logic Diagrams from Boolean
Expressions
• Use order of precedence.
• A bar over a group of variables is the
same as having those variables in
parentheses.
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Logic Diagrams from Boolean
Expressions
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+
=
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Truth Tables from Logic
Diagrams or Boolean
Expressions
• Two methods:
– Combine individual truth tables from each
gate into a final output truth table.
– Develop a Boolean expression and use it
to fill in the truth table.
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Truth Tables from Logic
Diagrams or Boolean
Expressions
+
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Truth Tables from Logic
Diagrams or Boolean
Expressions
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Circuit Description Using
Boolean Expressions
• Product term:
– Part of a Boolean expression where one or
more true or complement variables are
ANDed.
• Sum term:
– Part of a Boolean expression where one or
more true or complement variables are
ORed.
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Circuit Description Using
Boolean Expressions
• Sum-of-products (SOP):
– A Boolean expression where several
product terms are summed (ORed)
together.
• Product-of-sum (POS):
– A Boolean expression where several sum
terms are multiplied (ANDed) together.
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Examples of SOP and POS
Expressions
SOP : Y  AB  BC  A D
POS : Y  ( A  B )  (B  C )  ( A  C )
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SOP and POS Utility
• SOP and POS formats are used to present
a summary of the circuit operation.
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Bus Form
• A schematic convention in which each
variable is available, in true or complement
form, at any point along a conductor.
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Bus Form
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Deriving a SOP Expression
from a Truth Table
• Each line of the truth table with a 1
(HIGH) output represents a product
term.
• Each product term is summed (ORed).
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Deriving a POS Expression
from a Truth Table
• Each line of the truth table with a 0
(LOW) output represents a sum term.
• The sum terms are multiplied (ANDed).
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Deriving a POS Expression
from a Truth Table
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Table 3.7
SOP
_ _ __
_ _ _
_ _
_ __
_
_
__
_
_
ABCD + ABCD + ABCD + ABCD + ABCD+ ABCD+ ABCD+ ABCD
POS
_
_
_
_
_ _
(A + B + C + D)(A + B + C + D)(A + B + C + D)(A + B + C + D)
_ _ _ _
_ _
_ _ _ _ _ _
(A + B + C + D)(A + B + C + D)(A + B + C + D)(A + B + C + D)
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Theorems of Boolean Algebra
• Used to minimize a Boolean expression to
reduce the number of logic gates in a
network.
• 24 theorems.
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Commutative Property
• The operation can be applied in any order
with no effect on the result.
– Theorem 1: xy = yx
– Theorem 2: x + y = y + x
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Associative Property
• The operands can be grouped in any order
with no effect on the result.
– Theorem 3: (xy)z = x(yz) = (xz)y
– Theorem 4: (x + y) + z = x + (y + z) = (x + z) + y
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Distributive Property
• Allows distribution (multiplying through) of
AND across several OR functions.
• Theorem 5: x(y + z) = xy + xz
• Theorem 6: (x + y)(w + z) = xw + xz + yw + yz
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Distributive Property
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Operations with Logic 0
• Theorem 7: x  0 = 0
• Theorem 8: x + 0 = x
• Theorem 9: x  0 = x
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Theorem 7: x  0 = 0
A
0
0
1
1
X
0
1
0
1
X=0
X=1
Y=0
Y=0
Y
0
0
0
1
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Theorem 8: x + 0 = x
A
0
0
1
1
X
0
1
0
1
X=0
X=1
Y=0
Y=1
Y
0
1
1
1
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Theorem 9: x  0 = x
A
0
0
1
1
X
0
1
0
1
X=0
X=1
Y=0
Y=1
Y
0
1
1
0
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Operations with Logic 1
• Theorem 10: x  1 = x
• Theorem 11: x + 1 = 1
• Theorem 12: x  1  x
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Theorem 10: x  1 = x
A
0
0
1
1
X
0
1
0
1
X=0
X=1
Y=0
Y=1
Y
0
0
0
1
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Theorem 11: x + 1 = 1
A
0
0
1
1
X
0
1
0
1
X=0
X=1
Y=1
Y=1
Y
0
1
1
1
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Theorem 12: x  1  x
A
0
0
1
1
X
0
1
0
1
X=0
X=1
Y=1
Y=0
Y
0
1
1
0
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Operations with Logic 0 & 1
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Operations with the Same
Variable
• Theorem 13: x  x = x
• Theorem 14: x + x = x
• Theorem 15: x  x = 0
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Theorem 13: x  x = x
A
0
0
1
1
X
0
1
0
1
X=0
X=1
Y=0
Y=1
Y
0
0
0
1
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Theorem 14: x + x = x
A
0
0
1
1
X
0
1
0
1
X=0
X=1
Y=0
Y=1
Y
0
1
1
1
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Theorem 15: x  x = 0
A
0
0
1
1
X
0
1
0
1
X=0
X=1
Y=0
Y=0
Y
0
1
1
0
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Operations with the
Complement of a Variable
• Theorem 16 : x  x  0
• Theorem 17 : x  x  1
• Theorem 18 : x  x  1
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Theorem 16: x  x = 0
A
0
0
1
1
X
0
1
0
1
X=0
X=1
Y=0
Y=0
Y
0
0
0
1
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Theorem 17: x + x = 1
A
0
0
1
1
X
0
1
0
1
X=0
X=1
Y=1
Y=1
Y
0
1
1
1
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Theorem 18: x  x = 1
A
0
0
1
1
X
0
1
0
1
X=0
X=1
Y=1
Y=1
Y
0
1
1
0
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Operations with the Same Variable &
Complement of a Variable
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Double Inversion
Theorem 19 : x  x
X
_
X
_
_
X =X
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DeMorgan’s Theorem
Theorem 20 : x  y  x  y
Theorem 21: x  y  x  y
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Multivariable Theorems
• Theorem 22: x + xy = x
• Theorem 23: (x + y)(x + y) = x + yz
• Theorem 24 : x  xy  x  y
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Theorem 22: x + xy = x
x
X + xy = x
XY
y
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Theorem 23: (x + y)(x + y) = x + yz
x
x+y
y
(x + y)(x + z)
z
x+z
x
x + yz
y
z
yz
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Theorem 24 : x  xy  x  y
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Simplifying SOP and POS
Expressions
• A Boolean expression can be simplified
by:
– Applying the Boolean Theorems to the
expression
– Application of graphical tool called a
Karnaugh map (K-map) to the expression
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Simplifying an Expression
Y  AB  AB C
factoringout the common term AB
Y  AB (1  C )
applying theorem 11: (1  x  1)
Y  AB  1
applying theorem 10 : ( x  1  x )
Y  AB
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Simplifying an Expression
Y  AB  (C  A)
applying DeMorgan's theorem 20
Y  AB  (C  A)
applying DeMorgan's theorem 20
Y  A B C  A
factoringout A
Y  A (1  B  C  1)
applying theorem 11 : x  1  1
Y  A (1)
Y A
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Simplification By Karnaugh
Mapping
• A Karnaugh map, called a K-map, is a
graphical tool used for simplifying Boolean
expressions.
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Construction of a Karnaugh
Map
• Square or rectangle divided into cells.
• Each cell represents a line in the truth
table.
• Cell contents are the value of the output
variable on that line of the truth table.
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Construction of a Karnaugh
Map
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Construction of a Karnaugh
Map
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Construction of a Karnaugh
Map
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K-map Cell Coordinates
• Adjacent cells differ by only one variable.
• Grouping adjacent cells allows canceling
variables in their true and complement
forms.
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Loading a K-Map from a Truth
Table
• Each cell of the K-map represents one line
from the truth table.
• The K-map is not laid out in the same
order as the truth table.
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Loading a K-Map from a Truth
Table
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Grouping Cells along the
Outside Edge
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Loading a K-Map from a Truth
Table
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Grouping Cells
• Cells can be grouped as pairs, quads, and
octets.
• A pair cancels one variable.
• A quad cancels two variables.
• An octet cancels three variables.
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Grouping Cells
Y = A’B’ + A’B
Keep: A’
Discord: A, B, & B’
Y = A’
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Grouping Cells
Y = A’B’C + A’BC + ABC + AB’C
Discord: A, A’, B, &B’
Keep: C
Y=C
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Grouping Cells
Y = A’BC’D’ + A’BC’D + A’BCD + A’BCD’ +
ABC’D’ + ABC’D + ABCD + ABCD’
Discard:
Keep: B
A, C & D
Y=B
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Grouping Cells along the
Outside Edge
• The cells along an outside edge are
adjacent to cells along the opposite
edge.
• In a four-variable map, the four corner
cells are adjacent.
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Multiple Groups
• Each group is a term in the maximum SOP
expression.
• A cell may be grouped more than once as
long as every group has at least one cell
that does not belong to any other group.
Otherwise, redundant terms will result.
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Multiple Groups
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Maximum Simplification
• Achieved if the circled group of cells on
the K-map are as large as possible.
• There are as few groups as possible.
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Maximum Simplification
Keep: B’ & D
Y = B’ + D
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Using K-Maps for Partially
Simplified Circuits
• Fill in the K-map from the existing
product terms.
• Each product term that is not a minterm
will represent more than one cell.
• Once completed, regroup the K-map for
maximum simplification.
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Using K-Maps for Partially
Simplified Circuits
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Using K-Maps for Partially
Simplified Circuits
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Don’t Care States
• The output state of a circuit for a
combination of inputs that will never occur.
• Shown in a K-map as an “x”.
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Value of Don’t Care States
• In a K-map, set “x” to a 0 or a 1,
depending on which case will yield the
maximum simplification.
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Value of Don’t Care States
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POS Simplification Using
Karnaugh Mapping
• Group those cells with values of 0.
• Use the complements of the cell
coordinates as the sum term.
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POS Simplification Using
Karnaugh Mapping
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Universality of NAND/NOR
Gates
• Any logic gate can be implemented using
only NAND or only NOR gates.
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NOT from NAND
• An inverter can be constructed from a
single NAND gate by connecting both
inputs together.
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NOT from NAND
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AND from NAND
• The AND gate is created by inverting the
output of the NAND gate.
Y  A B  AB
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AND from NAND
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OR and NOR from NAND
OR  X  Y  X  Y
NOR  X  Y  X  Y
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OR from NAND
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NOR from NAND
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NOT from NOR
• An inverter can be constructed from a
single NOR gate by connecting both inputs
together.
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NOT from NOR
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OR from NOR
• The OR gate is created by inverting the
output of the NOR gate.
Y  AB  AB
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OR from NOR
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AND and NAND from NOR
AND  X  Y  X  Y
NAND  X  Y  X  Y
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AND from NOR
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NAND from NOR
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Practical Circuit
Implementation in SSI
• Not all gates are available in TTL.
• TTL components are becoming more
difficult to find.
• In a circuit design, it may be necessary
to replace gates with other types of
gates in order to achieve the final
design.
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Pulsed Operation
• The enabling and inhibiting properties of
the basic gates are used to pass or
block pulsed digital signals.
• The pulsed signal is applied to one
input.
• One input is used to control
(enable/inhibit) the pulsed digital signal.
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Pulsed Operation
108
Pulsed Operation
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General Approach to Logic
Circuit Design – 1
• Have an accurate description of the
problem.
• Understand the effects of all inputs on all
outputs.
• Make sure all combinations have been
accounted for.
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General Approach to Logic
Circuit Design – 2
• Active levels as well as the constraints on
all inputs and outputs should be specified.
• Each output of the circuit should be
described either verbally or with a truth
table.
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General Approach to Logic
Circuit Design – 3
• Look for keywords AND, OR, NOT that
can be translated into a Boolean
expression.
• Use Boolean algebra or K-maps to simplify
expressions or truth tables.
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