Transcript Counters - Engineering Home Page

Counters
Counter Instructions are used to perform
the following:
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Count up
Count down and
Add & subtract from one total
count as necessary
Structure of the Counter
Element:
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The counter element is
a block of data that
adds or subtracts from
a total as necessary.
The counter element is
comprised of words and
bits that keep track of
the counter data. The
words and bits in the
counter element are
arranged in the
following manner.
Definitions are provided
following the diagram:
Counter words and bits:
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A counter element contains the following addressable
words and bits that provide information concerning
the counter:
Preset Value (.PRE): the value that the counter
must reach to change the state of the done bit.
Accumulated Value (.ACC): the number of false-totrue transitions that have occurred since the counter
was last reset. Accumulated values are retained if
there are no mode changes or power cycles.
Count-Up Enable Bit (CU): a bit set when a rung
containing a count up instruction is true.
Count-Down Enable Bit (CD): a bit set when a rung
containing a count down instruction is true.
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Done Bit (DN): a bit that changes state
when the accumulated value is equal to or
greater than the preset value.
Overflow Bit (OV): a bit set when counter
has counted up above the upper limit of
+32,767.
Underflow Bit (UN): a bit set when counter
has counted down below the lower limit of 32,7678.
Update Accumulated Value (UA): a bit used
with the High Speed Counter (HSC)
instruction in fixed controllers only.
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The counter
address, preset, and
accumulated values
can be entered
directly into the
instruction:
Count Up (CTU):
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An output instruction
that counts up for each
false-to-true transition
of conditions preceding
it in the rung, which
produces an output when
the accumulated value
reaches the preset
value.
Counter Value Range:
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The count value of a
counter must remain
in the range of
+32,767 to -32,768
as detailed:
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If the count value is greater than +32,767,
the counter will continue counting and the
counter status overflow bit (OV) is set.
If the count value exceeds -32,768, the
counter will continue counting and the counter
status underflow bit (UN) is set.
Program a Reset (RES) instruction to reset
the accumulated value of a counter to zero.
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Each count is retained when the rung conditions
again become false, permitting counting to continue
beyond the preset value.
Each time the rung containing the CTU instruction
changes from false to true, the accumulated value
increments by one. The status bits are set or reset
as follows:
Counter Instruction Selection:
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The following table outlines the functions of
the available counter instructions and the
Reset (RES) instruction:
Count Down (CTD):
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An output instruction
that counts down for
each false-to-true
transition of conditions
preceding it in the rung
and produces an output
when the accumulated
value reaches the
preset value.
A CTD instruction is
shown in the following
graphic:
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Each time the rung containing the CTD
instruction changes from false to true,
the accumulated value decrements by
one. The count is retained until either
one of the following is true:
An RES instruction with the same
address as the counter is enabled.
Another instruction in the program
overwrites the value.
Counter Instruction Addressing:
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To activate the
selected counter,
the counter must be
programmed in an
output position and
addressed as a whole
at the element level.
To address the
counter element, use
the following
address format:
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The status bits are set or reset as
follows:
The table below charts the state of bits based on
the rung continuity for the CTU instruction:
The table below charts the state of bits based
on the rung continuity for the CTD instruction:
Reset (RES)
The following is an example of a programmed RES
instruction. Note the changes that occur in C5:1 when the
rung goes true:
Interpreting Count Up (CTU) and Count Down
(CTD) Instructions:
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The following graphic shows an example of both CTU
and CTD instructions. In the example, note the
following:
Each time Pushbutton 4 is closed, the accumulated value
(count) increases by one.
When the Accum >_ preset, the C5:1/DN bit is set.
The Accum will continue to accumulate upon each falseto-true transition of the rung unless the counter is
reset.
Each time Pushbutton 5 is closed, the accumulated value
(count) decreases by one.
The Accum will continue to decrease upon each false-totrue transition of the rung unless the counter is reset.