CSE 477. VLSI Systems Design
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Transcript CSE 477. VLSI Systems Design
CSE477
VLSI Digital Circuits
Fall 2002
Lecture 08: MOS & Wire Capacitances
Mary Jane Irwin ( www.cse.psu.edu/~mji )
www.cse.psu.edu/~cg477
[Adapted from Rabaey’s Digital Integrated Circuits, ©2002, J. Rabaey et al.]
CSE477 L08 Capacitance.1
Irwin&Vijay, PSU, 2002
Review: Delay Definitions
Vin
Vout
Vin
Propagation delay
input
waveform
50%
tp = (tpHL + tpLH)/2
tpHL
t
tpLH
Vout
90%
output
waveform
signal slopes
50%
10%
tf
CSE477 L08 Capacitance.2
tr
t
Irwin&Vijay, PSU, 2002
CMOS Inverter: Dynamic
Transient, or dynamic, response determines the
maximum speed at which a device can be operated.
VDD
Today’s focus
Vout = 0
CL
Rn
Vin = V DD
CSE477 L08 Capacitance.3
tpHL = f(Rn, CL)
Next lecture’s focus
Irwin&Vijay, PSU, 2002
Sources of Capacitance
Vout
Vin
Vout2
CL
M2
Vin
CG4
M4
CDB2
Vout
CGD12
M1
Vout2
Cw
CDB1
M3
CG3
intrinsic MOS transistor capacitances
extrinsic MOS transistor (fanout) capacitances
wiring (interconnect) capacitance
CSE477 L08 Capacitance.4
Irwin&Vijay, PSU, 2002
MOS Intrinsic Capacitances
Structure
Channel
capacitances
capacitances
Depletion
regions of the reversebiased pn-junctions of the drain and
source
CSE477 L08 Capacitance.5
Irwin&Vijay, PSU, 2002
MOS Structure Capacitances
lateral diffusion
Top view
Source
n+
Poly Gate
xd
xd
Drain
W n+
Ldrawn
n+
Leff
tox
n+
Overlap capacitance (linear)
CGSO = CGDO = Cox xd W = Co W
CSE477 L08 Capacitance.6
Irwin&Vijay, PSU, 2002
MOS Channel Capacitances
The gate-to-channel capacitance depends upon
the operating region and the terminal voltages
CGS = CGCS + CGSO
CGD = CGCD + CGDO
G
VGS
S
+
D
-
n+
n channel
n+
CGB = CGCB
p substrate
depletion
region
B
CSE477 L08 Capacitance.7
Irwin&Vijay, PSU, 2002
Review: Summary of MOS Operating Regions
Cutoff (really subthreshold) VGS VT
Exponential in VGS with linear VDS dependence
ID = IS e (qVGS/nkT) (1 - e -(qVDS/kT) ) (1 - VDS) where n 1
Strong Inversion VGS > VT
Linear (Resistive) VDS < VDSAT = VGS - VT
ID = k’ W/L [(VGS – VT)VDS – VDS2/2] (1+VDS) (VDS)
Saturated (Constant Current) VDS VDSAT = VGS - VT
IDSat = k’ W/L [(VGS – VT)VDSAT – VDSAT2/2] (1+VDS) (VDSAT)
NMOS
VT0(V)
0.43
(V0.5)
0.4
VDSAT(V)
0.63
k’(A/V2)
115 x 10-6
(V-1)
0.06
PMOS
-0.4
-0.4
-1
-30 x 10-6
-0.1
CSE477 L08 Capacitance.8
Irwin&Vijay, PSU, 2002
Average Distribution of Channel Capacitance
Operation
Region
CGCB
CGCS
CGCD
CGC
CG
Cutoff
CoxWL
0
0
CoxWL
CoxWL +
2CoW
Resistive
0
CoxWL/2
CoxWL/2
CoxWL
CoxWL +
2CoW
Saturation
0
(2/3)CoxWL
0
(2/3)CoxWL (2/3)CoxWL +
2CoW
Channel capacitance components are nonlinear and
vary with operating voltage
Most important regions are cutoff and saturation
since that is where the device spends most of its time
CSE477 L08 Capacitance.9
Irwin&Vijay, PSU, 2002
MOS Diffusion Capacitances
The junction (or diffusion) capacitance is from the
reverse-biased source-body and drain-body pn-junctions.
G
VGS
S
+
D
-
n+
n channel
n+
p substrate
CSB = CSdiff
depletion
region
CDB = CDdiff
B
CSE477 L08 Capacitance.10
Irwin&Vijay, PSU, 2002
Source Junction View
channel-stop
implant (NA+)
W
source
bottom plate
(ND)
junction xj
depth
channel
side walls
substrate (NA)
LS
Cdiff = Cbp + Csw = Cj AREA + Cjsw PERIMETER
= Cj LS W + Cjsw (2LS + W)
CSE477 L08 Capacitance.11
Irwin&Vijay, PSU, 2002
Review: Reverse Bias Diode
All diodes in MOS digital circuits are reverse
biased; the dynamic response of the diode
+
is determined by depletion-region charge or VD
junction capacitance
Cj = Cj0/((1 – VD)/0)m
where Cj0 is the capacitance under zero-bias conditions (a
function of physical parameters), 0 is the built-in potential
(a function of physical parameters and temperature)
and m is the grading coefficient
m = ½ for an abrupt junction (transition from n to p-material is
instantaneous)
m = 1/3 for a linear (or graded) junction (transition is gradual)
Nonlinear dependence (that decreases with increasing
reverse bias)
CSE477 L08 Capacitance.12
Irwin&Vijay, PSU, 2002
Reverse-Bias Diode Junction Capacitance
2
abrupt (m=1/2)
Cj (fF)
1.5
1
linear (m=1/3)
0.5
Cj0
0
-5
CSE477 L08 Capacitance.14
-4
-3
-2
-1
VD (V)
0
1
Irwin&Vijay, PSU, 2002
MOS Capacitance Model
CGS = CGCS + CGSO
G
CGD = CGCD + CGDO
CGS
CGD
S
D
CSB
CSB = CSdiff
CGB
B
CDB
CDB = CDdiff
CGB = CGCB
CSE477 L08 Capacitance.15
Irwin&Vijay, PSU, 2002
Transistor Capacitance Values for 0.25
Example: For an NMOS with L = 0.24 m, W = 0.36 m,
LD = LS = 0.625 m
CGSO = CGDO = Cox xd W = Co W = 0.11 fF
CGC = Cox WL = 0.52 fF
so Cgate_cap = CoxWL + 2CoW = 0.74 fF
Cbp = Cj LS W = 0.45 fF
Csw = Cjsw (2LS + W) = 0.45 fF
so Cdiffusion_cap = 0.90 fF
NMOS
PMOS
Cox
Co
Cj
(fF/m2)
(fF/m)
(fF/m2)
6
6
0.31
0.27
2
1.9
CSE477 L08 Capacitance.17
b
Cjsw
(V)
(fF/m)
0.5 0.9
0.48 0.9
0.28
0.22
mj
mjsw
bsw
(V)
0.44
0.32
0.9
0.9
Irwin&Vijay, PSU, 2002
Review: Sources of Capacitance
Vout
Vin
Vout2
CL
CG4
M2
Vin
CGD12pdrain
M4
CDB2
ndrain
CDB1
M1
Vout
Vout2
Cw
M3
CG3
intrinsic MOS transistor capacitances
extrinsic MOS transistor (fanout) capacitances
wiring (interconnect) capacitance
CSE477 L08 Capacitance.18
Irwin&Vijay, PSU, 2002
Gate-Drain Capacitance: The Miller Effect
M1 and M2 are either in cut-off or in saturation.
The floating gate-drain capacitor is replaced by a
capacitance-to-ground (gate-bulk capacitor).
V
CGD1
Vin
V
M1
Vout
Vout
2CGB1
V
Vin
V
M1
A capacitor experiencing identical but opposite voltage
swings at both its terminals can be replaced by a
capacitor to ground whose value is two times the original
value
CSE477 L08 Capacitance.19
Irwin&Vijay, PSU, 2002
Drain-Bulk Capacitance: Keq’s (for 2.5 m)
We can simplify the diffusion capacitance calculations
even further by using a Keq to relate the linearized
capacitor to the value of the junction capacitance under
zero-bias
Ceq = Keq Cj0
NMOS
PMOS
CSE477 L08 Capacitance.20
high-to-low
Keqbp
Keqsw
0.57
0.61
0.79
0.86
low-to-high
Keqbp
Keqsw
0.79
0.81
0.59
0.7
Irwin&Vijay, PSU, 2002
Extrinsic (Fan-Out) Capacitance
The extrinsic, or fan-out, capacitance is the total gate
capacitance of the loading gates M3 and M4.
Cfan-out = Cgate (NMOS) + Cgate (PMOS)
= (CGSOn+ CGDOn+ WnLnCox) + (CGSOp+ CGDOp+ WpLpCox)
Simplification of the actual situation
Assumes all the components of Cgate are between Vout and GND
(or VDD)
Assumes the channel capacitances of the loading gates are constant
CSE477 L08 Capacitance.21
Irwin&Vijay, PSU, 2002
Layout of Two Chained Inverters
VDD
PMOS
1.125/0.25
1.2m
=2
Out
In
Metal1
Polysilicon
0.125
0.5
NMOS
0.375/0.25
W/L
AD (m2)
NMOS 0.375/0.25
0.3
PMOS 1.125/0.25
0.7
CSE477 L08 Capacitance.22
GND
PD (m)
1.875
2.375
AS (m2) PS (m)
0.3
1.875
0.7
2.375
Irwin&Vijay, PSU, 2002
Components of CL (0.25 m)
Expression
Value (fF) Value (fF)
HL
LH
0.23
0.23
C Term
CGD1
2 Con Wn
CGD2
2 Cop Wp
0.61
0.61
CDB1
KeqbpnADnCj + KeqswnPDnCjsw
0.66
0.90
CDB2
KeqbppADpCj + KeqswpPDpCjsw
1.5
1.15
CG3
(2 Con)Wn + CoxWnLn
0.76
0.76
CG4
(2 Cop)Wp + CoxWpLp
2.28
2.28
Cw
from extraction
0.12
0.12
CL
6.1
6.0
CSE477 L08 Capacitance.23
Irwin&Vijay, PSU, 2002
Wiring Capacitance
The wiring capacitance depends upon the length and
width of the connecting wires and is a function of the
fan-out from the driving gate and the number of fan-out
gates.
Wiring capacitance is growing in importance with the
scaling of technology.
CSE477 L08 Capacitance.24
Irwin&Vijay, PSU, 2002
Parallel Plate Wiring Capacitance
current flow
L
electrical field lines
W
H
tdi
dielectric (SiO2)
substrate
permittivity
constant
(SiO2= 3.9)
CSE477 L08 Capacitance.25
Cpp = (di/tdi) WL
Irwin&Vijay, PSU, 2002
Permittivity Values of Some Dielectrics
Material
Free space
Teflon AF
Aromatic thermosets (SiLK)
Polyimides (organic)
Fluorosilicate glass (FSG)
Silicon dioxide
Glass epoxy (PCBs)
Silicon nitride
Alumina (package)
Silicon
CSE477 L08 Capacitance.26
di
1
2.1
2.6 – 2.8
3.1 – 3.4
3.2 – 4.0
3.9 – 4.5
5
7.5
9.5
11.7
Irwin&Vijay, PSU, 2002
Sources of Interwire Capacitance
Cwire = Cpp + Cfringe + Cinterwire
= (di/tdi)WL
+ (2di)/log(tdi/H)
+ (di/tdi)HL
fringe
interwire
pp
CSE477 L08 Capacitance.27
Irwin&Vijay, PSU, 2002
Impact of Fringe Capacitance
H/tdi = 1
H/tdi = 0.5
Cpp
W/tdi
CSE477 L08 Capacitance.28
(from [Bakoglu89])
Irwin&Vijay, PSU, 2002
Impact of Interwire Capacitance
(from [Bakoglu89])
CSE477 L08 Capacitance.29
Irwin&Vijay, PSU, 2002
Insights
For W/H < 1.5, the fringe component dominates the
parallel-plate component. Fringing capacitance can
increase the overall capacitance by a factor of 10 or more.
When W < 1.75H interwire capacitance starts to dominate
Interwire capacitance is more pronounced for wires in the
higher interconnect layers (further from the substrate)
Rules of thumb
Never run wires in diffusion
Use poly only for short runs
Shorter wires – lower R and C
Thinner wires – lower C but higher R
Wire delay nearly proportional to L2
CSE477 L08 Capacitance.30
Irwin&Vijay, PSU, 2002
Wiring Capacitances
Poly
Al1
Al2
Al3
Al4
Al5
Field
88
54
30
40
13
25
8.9
18
6.5
14
5.2
12
Interwire Cap
Active
41
47
15
27
9.4
19
6.8
15
5.4
12
Poly
57
54
17
29
10
20
7
15
5.4
12
Al1
Al2
Al3
Al4
pp in aF/m2
fringe in aF/m
36
45
15
27
8.9
18
6.6
14
41
49
15
27
9.1
19
35
45
14
27
38
52
Poly
Al1
Al2
Al3
Al4
Al5
40
95
85
85
85
115
per unit wire length in aF/m for minimally-spaced wires
CSE477 L08 Capacitance.31
Irwin&Vijay, PSU, 2002
Dealing with Capacitance
Low capacitance (low-k) dielectrics (insulators) such
as polymide or even air instead of SiO2
family of materials that are low-k dielectrics
must also be suitable thermally and mechanically and
compatible with (copper) interconnect
Copper interconnect allows wires to be thinner without
increasing their resistance, thereby decreasing
interwire capacitance
SOI (silicon on insulator) to reduce junction
capacitance
CSE477 L08 Capacitance.32
Irwin&Vijay, PSU, 2002
Next Time: Dealing with Resistance
MOS structure resistance - Ron
Wiring resistance
Contact resistance
CSE477 L08 Capacitance.33
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Next Lecture and Reminders
Next lecture
MOS resistance
- Reading assignment – Rabaey, et al, 4.3.2, 4.4.1-4.4.4
Reminders
Lecture lectures 9+10 will be combined on the 26th
HW2 due today
Project specifications dues October 3rd
HW3 due Oct 10th
Evening midterm exam scheduled
- Wednesday, October 16th from 8:15 to 10:15pm in 260 Willard
- Only one midterm conflict filed for so far
CSE477 L08 Capacitance.34
Irwin&Vijay, PSU, 2002