Transcript AXE 10 Minutes, SW Recovery

AXE 10 Minutes, AXE based nodes
ADSL
IN SCP
AN
R
L
CCN
GSM
I
T
BSC
FNR
HLR
I
SCP
BTS
GMSC
MSC
SGSN
GPRS
RNC
AS
SCP
HLR
GMSC
MSC
GGSN
“MGW”
3G
UMTS
ILR
T
PCU
MS
L
T
Internet
CSCF
IPMM/SIP
HSS
ATM Back bone
OSS
2003-11-06
1
MSC TDMA
MS
T
G
AN
TeS
AXE
TSP
CPP
WPP
AXD
EAR
TMOS/CIF
AXE 10 minutes, Processors
Central
Central
Processor
Processor
Soft Real Time
Hard Real Time
Adjunct
Adjunct
Pro,( I/O)
Pro,( I/O)
Regional
Processor
Application Hardware
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2
AXE 10 Minutes, SW Maintenance
• Corrections/patches are introduced without disturbance
• New SW packages are introduced in the stand-by side,
inherits data from the executive-side and are switch in with
a system restart => yearly disturbance
2003-11-06
3
AXE 10 Minutes, Low Level Recovery
A ‘forlopp’ identity, FID, is tied to each resource
included in a ‘transaction’, typically a a call or a
command.
The processing platform provides support for creation
of FID and in case of an execution error, identifies all
resources concerned and orders release over a
standard interface.
Fx
Fx
Fx
Forlopp handler
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Fx
AXE 10 Minutes, SW Recovery
SW Error
Low Level Recovery
No Action Filter
< 0,1%
System Restart
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99,8%
0,1%
AXE 10 Minutes, CP ’Classic‘ vs ‘Modern’
Application SW
Same
APZ-CP OS
Application SW
Same
APZ-CP OS
APZ-VM
MIP
ASAcompiler
OS (Tru64™)
HW
HW (-procesor)
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Same
AXE 10 Minutes, Multi-threaded Execution
• Must be 101% compatible with application SW (includes
fault compatibility!)
• The problem is not to make it work
• The real problem is to make an efficient implementation
with limited over-head including the cost for cache
coherency
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CMX-FD. Simplified View
AXE 10 Minutes, Concurrent Multi Execution
Memory
Cluster of APZ-OS
and Platform SW
Memory
Cluster of
Application Modules
Processor Core
Processor Core
FD
FD
CMX
CMX
Processor Core
Processor Core
FD
FD
CMX
CMX
Memory
Cluster of
Application Modules
Memory
Cluster of
Application Modules
FD-mode:
Functional Distribution, that is each function is allocated to execute on one Processor Core only.
CMX-mode:
Concurrent (Multi) eXecution, that is each block is allowed to execute on all Processor Cores, but
only at one at a time. Certain sequencing rules must be obeyed in order to make each “call” execute like it would in a single CP system.
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