Transcript ppt - SEAS
ESE370: Circuit-Level Modeling, Design, and Optimization for Digital Systems Day 22: October 31, 2011 Pass Transistor Logic 1 Penn ESE370 Fall2011 -- DeHon Previously 2 Penn ESE370 Fall2011 -- DeHon Two Xor Gates 3 Penn ESE370 Fall2011 -- DeHon Today • Pass Transistor Circuit – Output levels – Cascading • Series pass transistors? • Delay • Transmission gates • Tristate gates 4 Penn ESE370 Fall2011 -- DeHon Cascading Pass Transistors 5 Penn ESE370 Fall2011 -- DeHon Chain without Inverters • What if we did this? 6 Penn ESE370 Fall2011 -- DeHon Extract key path 7 Penn ESE370 Fall2011 -- DeHon t=0 (after Vin transition 10) 8 Penn ESE370 Fall2011 -- DeHon t=4t (after Vin transition 10) 9 Penn ESE370 Fall2011 -- DeHon t=∞ (after Vin transition 10) 10 Penn ESE370 Fall2011 -- DeHon Focus on Pass tr • Vgs? • Operation mode? • Current flow? 11 Penn ESE370 Fall2011 -- DeHon Voltage of Chain • What is voltage at output? 12 Penn ESE370 Fall2011 -- DeHon How compare • Compare 13 Penn ESE370 Fall2011 -- DeHon DC Analysis 14 Penn ESE370 Fall2011 -- DeHon DC Analysis – chain of 6 15 Penn ESE370 Fall2011 -- DeHon Conclude • Can chain any number of pass transistors and only drop a single Vth 16 Penn ESE370 Fall2011 -- DeHon Capacitance • What is Capacitance per stage (@y)? 17 Penn ESE370 Fall2011 -- DeHon Delay • Delay as a function of chain length? 18 Penn ESE370 Fall2011 -- DeHon Compare • CMOS • Buffered Pass TR • Unbuffered Pass TR • Delay • Area 19 Penn ESE370 Fall2011 -- DeHon Pass TR Tree • What if we did this? 20 Penn ESE370 Fall2011 -- DeHon Path • What’s different about this? 21 Penn ESE370 Fall2011 -- DeHon Gate Cascade? • What are voltages? 22 Penn ESE370 Fall2011 -- DeHon Demonstration Circuit 23 Penn ESE370 Fall2011 -- DeHon SPICE • TODO show spice results of voltages 24 Penn ESE370 Fall2011 -- DeHon Demonstration Chain 25 Penn ESE370 Fall2011 -- DeHon Spice 26 Penn ESE370 Fall2011 -- DeHon Conclude • Cannot cascade degraded inputs into gates. 27 Penn ESE370 Fall2011 -- DeHon Pass Rail-to-Rail 28 Penn ESE370 Fall2011 -- DeHon Transmission Gate 29 Penn ESE370 Fall2010 -- DeHon Bus Drivers 30 Penn ESE370 Fall2011 -- DeHon Tristate Driver 31 Penn ESE370 Fall2010 -- DeHon Tri-State Drivers Admin • Project – Due Friday • Midterm 2: Nov. 9th – Week from today in the evening 33 Penn ESE370 Fall2011 -- DeHon Midterm Topics • Scaling • Tau-model – Estimation and optimization • Elmore-delay – Estimation and optimization • Energy and power – Estimation and optimization • Logic – CMOS – Ratioed – Pass transistor • No clocking – Except to motivate delay targets and power calculations Note: 2010 midterm Q4 – Cdiff, trans gates, Elmore, opt. 34 Penn ESE370 Fall2011 -- DeHon Idea • There are other circuit disciplines • Can use pass transistors for logic – Even chains of pass transistors – Sometimes gives area or delay win • Do not cascade as easily as CMOS 35 Penn ESE370 Fall2011 -- DeHon