Transcript Chapter 1

Microprocessors
Chapter 8
Memory Interface
prepared by
Dr. Mohamed A. Shohla
Chapter Overview
•
•
•
•
Memory Devices
Address Decoding
8088 and 80188 (8-Bit) Memory Interface
8086, 80186, 80286, and 80386SX (16-Bit)
Memory Interface
• Cache Memory
‫جام عة الم نوف ية‬
Faculty of Electronic Engineering – Dept. of Computer Science & Eng.
Microprocessors Course
8-2
Memory Devices
• Address Connections
• Data Connections
• Selection Connections
‫جام عة الم نوف ية‬
Faculty of Electronic Engineering – Dept. of Computer Science & Eng.
Microprocessors Course
8-3
Semiconductor Memory Types
‫جام عة الم نوف ية‬
Faculty of Electronic Engineering – Dept. of Computer Science & Eng.
Microprocessors Course
8-4
Semiconductor Memory
• RAM
• Misnamed as all semiconductor memory is random
access
• Read/Write
• Volatile
• Temporary storage
• Static or dynamic
‫جام عة الم نوف ية‬
Faculty of Electronic Engineering – Dept. of Computer Science & Eng.
Microprocessors Course
8-5
Memory Cell Operation
‫جام عة الم نوف ية‬
Faculty of Electronic Engineering – Dept. of Computer Science & Eng.
Microprocessors Course
8-6
Dynamic RAM
•
•
•
•
•
•
•
•
•
•
Bits stored as charge in capacitors
Charges leak
Need refreshing even when powered
Simpler construction
Smaller per bit
Less expensive
Need refresh circuits
Slower
Main memory
Essentially analogue
• Level of charge determines value
‫جام عة الم نوف ية‬
Faculty of Electronic Engineering – Dept. of Computer Science & Eng.
Microprocessors Course
8-7
Static RAM
•
•
•
•
•
•
•
•
•
•
Bits stored as on/off switches
No charges to leak
No refreshing needed when powered
More complex construction
Larger per bit
More expensive
Does not need refresh circuits
Faster
Cache
Digital
• Uses flip-flops
‫جام عة الم نوف ية‬
Faculty of Electronic Engineering – Dept. of Computer Science & Eng.
Microprocessors Course
8-8
SRAM v DRAM
• Both volatile
• Power needed to preserve data
• Dynamic cell
•
•
•
•
•
Simpler to build, smaller
More dense
Less expensive
Needs refresh
Larger memory units
• Static
• Faster
• Cache
‫جام عة الم نوف ية‬
Faculty of Electronic Engineering – Dept. of Computer Science & Eng.
Microprocessors Course
8-9
Read Only Memory (ROM)
• Permanent storage
• Nonvolatile
•
•
•
•
‫جام عة الم نوف ية‬
Microprogramming (see later)
Library subroutines
Systems programs (BIOS)
Function tables
Faculty of Electronic Engineering – Dept. of Computer Science & Eng.
Microprocessors Course
8 - 10
Types of ROM
• Written during manufacture
• Very expensive for small runs
• Programmable (once)
• PROM
• Needs special equipment to program
• Read “mostly”
• Erasable Programmable (EPROM)
• Erased by UV
• Electrically Erasable (EEPROM)
• Takes much longer to write than read
• Flash memory
• Erase whole memory electrically
‫جام عة الم نوف ية‬
Faculty of Electronic Engineering – Dept. of Computer Science & Eng.
Microprocessors Course
8 - 11
Address Decoding
•
Simple NAND Gate Decoder
A decoder
used to
select a
2K x 8
EPROM for
memory
locations
FF800HFFFFFH.
‫جام عة الم نوف ية‬
2K-8
Faculty of Electronic Engineering – Dept. of Computer Science & Eng.
Microprocessors Course
8 - 12
Sample Decoder Circuit
•The 74LS138, 3-to-8 line decoder
‫جام عة الم نوف ية‬
Faculty of Electronic Engineering – Dept. of Computer Science & Eng.
Microprocessors Course
8 - 13
Example:
Design a 64K-8 EPROM interface for the
8088 microprocessor using EPROM chips (8K x 8). The
ROM memory starts at address F0000H-FFFFFH.
‫جام عة الم نوف ية‬
Faculty of Electronic Engineering – Dept. of Computer Science & Eng.
Microprocessors Course
8 - 14
Basic 8088 Memory Interface
• Interfacing EPROM to the 8088
A 32K-8 EPROM
interface for the
8088 using
EPROM chips
(4K x 8). The
ROM memory
starts at address
F8000H-FFFFFH.
‫جام عة الم نوف ية‬
Faculty of Electronic Engineering – Dept. of Computer Science & Eng.
Microprocessors Course
8 - 15
Data D0 - D7
• Interfacing RAM
to the 8088
Address A0 - A14
WR
RD
A15
A
A16
B
A17
A 512K-8 RAM
interface for the
8088 using RAM
chips (32K x 8).
The ROM
memory starts at
address 00000H.
A18
A
A19
B
Y1
Y2
74138 Y3
3x8
Decoder Y4
G1
Y5
G2A
Y6
G2B
Y7
C
CS
CS
CS
Y0
Y1
Y2
74138 Y3
3x8
Decoder Y4
G1
Y5
G2A
Y6
G2B
Y7
C
Vcc
A15
A
A16
B
A17
IO/M
‫جام عة الم نوف ية‬
Y0
32 K x 8
SRAM
32 K x 8
WR SRAM
32 K x 8
OE
SRAM
32 K x 8
CS
SRAM
32 K x 8
CS
SRAM
32 K x 8
CS
SRAM
32 K x 8
CS
SRAM
32 K x 8
CS
SRAM
Y0
Y1
Y2
74138 Y3
3x8
Decoder Y4
G1
Y5
G2A
Y6
G2B
Y7
C
32 K x 8
SRAM
32 K x 8
WR SRAM
32 K x 8
OE
SRAM
32 K x 8
CS
SRAM
32 K x 8
CS
SRAM
32 K x 8
CS
SRAM
32 K x 8
CS
SRAM
32 K x 8
CS
SRAM
Faculty of Electronic Engineering – Dept. of Computer Science & Eng.
Microprocessors Course
CS
CS
CS
8 - 16