Transcript I0.1 - The George W. Woodruff School of Mechanical Engineering
ME4447/6405 George W. Woodruff School of Mechanical Engineering, Georgia Tech
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Introduction
• Today programmable controllers are found in almost all areas of life.
• In the past control tasks were solved with switch and relay controls. The function of controller was defined through the wiring and combination of switching elements.
• For PLC, the wiring effort is considerably less. The function of controller is defined by program . George W. Woodruff School of Mechanical Engineering, Georgia Tech
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Outline
• Section 1: Brief Introduction of Relay Control Panels • Section 2: Basic Components of PLC System • Section 3: Program Execution In PLC • Section 4: Basic PLC Programming • Section 5: Extending Ladder Logic Beyond Relay Logic George W. Woodruff School of Mechanical Engineering, Georgia Tech
ME4447/6405 George W. Woodruff School of Mechanical Engineering, Georgia Tech
ME4447/6405 Before the invention of the Programmable Logic Controller (PLC), most industrial control was done using relay control panels. Logical decisions are made on relay control panels by wiring several to thousands of :
Switches Relays
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Switch
Pin 2 Pin1 Movable Contact Released Pressed Pin 1 and 2 connected Pin 1 and 3 connected Pin 3 Switch is a type of binary state device.
Take push button switch as example, it has two state: released and pressed Depending on the wiring, switch has two different usages: “ normally closed switch ” : Pins 1 and 2 are wired to the circuit. When the switch is released, current can pass through (closed circuit).
“ normally open switch ” : Pins 1 and 3 are wired to the circuit. When the switch is released, current cannot pass through (open circuit).
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Relay
A relay is an electrically operated switch, which consists of coil and switch. When no current is passed through the coil, pin 1 and 2 are connected.
When current is passed through the coil, the contact is pulled by electromagnetic force and pin 1 and 3 are connected.
1 1 3 2 Coil off: Pin 1 and 2 connected 3 connected 2 Coil on: Pin 1 and 3 Combinations of switches and relays can realize simple to extremely complicated logical operations.
Control function is defined through wiring switching elements. George W. Woodruff School of Mechanical Engineering, Georgia Tech
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“NOT” operation
Input connected to one relay, whose switch is wired as a normally closed switch Input V+ 3 2 Output
Input
0 1
Output
1 0 George W. Woodruff School of Mechanical Engineering, Georgia Tech
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“AND” operation
Two relays in series Input 1 connected to one relay, whose switch is wired as a normally open switch Input 2 connected to the other relay, whose switch is wired as a normally open switch V+ Input 1 3 2
Input 1
0 1 0 1
Input 2
0 0 1 1
Output
0 0 0 1 Input 2 3 2 Output George W. Woodruff School of Mechanical Engineering, Georgia Tech
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“OR” operation
Two relays in parallel Input 1 connected to one relay, whose switch is wired as a normally open switch Input 2 connected to the other relay, whose switch is wired as a normally open switch Input 1 Input 2 3 V+ 2 3 V+ 2 Output
Input 1
0 1 0 1
Input 2
0 0 1 1
Output
0 1 1 1 George W. Woodruff School of Mechanical Engineering, Georgia Tech
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“XOR” operation
Four relays, two paths in parallel, on each path two in series Input 1 connected to two relays, one on each path, whose switches are wired as a normally open switch and normally close switch, respectively Input 2 connected to the other two relays, whose switches are wired opposite to Input 1 on each path Input 1 3 V+ 1 2 3 V+ 1 2
Input 1
0 1 0 1
Input 2
0 0 1 1
Output
0 1 1 0 1 1 Input 2 3 2 3 2 Output George W. Woodruff School of Mechanical Engineering, Georgia Tech
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Problems with relay control panels:
Mechanical Relays and switches failed regularly (coil failure, contact wear and contamination, etc.) Difficult to diagnose problems and replace relays and switches Difficult to change hardwired logic (example: changing an “OR” circuit to “XOR”) Consumed a lot of power To address these problems, Richard E. Morley of Bedford Associates invented the first PLC as a consulting project for General Electric in 1968. Bedford Associates is currently named Modicon and is a supplier of PLCs.
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ME4447/6405 George W. Woodruff School of Mechanical Engineering, Georgia Tech
ME4447/6405 Basic PLC System Components include: Power Supply CPU Signal Modules (expandable I/Os) Communication Modules HMI(Human Machine Interface) Programming Device (e.g. PC) Siemens SIMATIC S7-1200 PLC system will be used as an example, which is installed in the Mechatronics Laboratory in 2012.
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Power Supply
Every PLC has an external or internal Power Supply. Typically 24 Volts for industrial PLCs.
Power Supplies convert 110V AC to 24V DC.
Power Supplies may have more than one isolated outputs. One isolated output is reserved for the PLC CPU. The rest are reserved for other components such as communication module.
The S7-1200 PLC uses the Siemens A&D PS307 5A power supply. The PS307 5A can source 5 amps of current at 24 volts. The PS307 5A has 3 isolated outputs.
Siemens 07 5A George W. Woodruff School of Mechanical Engineering, Georgia Tech
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CPU
Every PLC system has at least one CPU The SIMATIC S7-1200 system comes in four different models, with CPU 1211C, CPU 1212C, CPU 1214C and CPU 1215C, that may each be expanded to exactly fit the application requirements.
In our lab PLC system, CPU 1214C DC/DC/DC is used , which accepts up to eight signal modules at the right side of the CPU.
The digital and analog I/Os can easily be expanded without affecting the physical size of the controller by installing a signal board inside the front of the CPUs .
CPU 1214C DC/DC/DC George W. Woodruff School of Mechanical Engineering, Georgia Tech
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CPU ( Continued)
User Memory Areas on a CPU : LOAD Memory • Non-volatile storage for the user program, data and configuration • For CPU 1214C: 2MB integrated Load Memory + SIMATIC Memory Card (optional) WORK Memory • • Volatile storage for some elements of the user project while executing. When PLC starts, The CPU copies some elements of the project from load memory into work memory.
• For CPU 1214C: 50 Kbytes of WORK memory Retentive Memory • non-volatile storage for a limited quantity of work memory values • For CPU 1214C: 2 Kbytes of Retentive memory George W. Woodruff School of Mechanical Engineering, Georgia Tech
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CPU ( Continued)
Bit Memory (M) • • Bit memory is a free area of RAM that can be used by the programmer For CPU 1214C: 8192 bytes of WORK memory Process Image • • • Process Image input (I) is memory location for each physical input pin Process Image output (Q) is memory location for each physical output pin To immediately access the physical inputs and physical outputs, append a ":P" to the address (e.g. I0.1:P).
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Signal Modules (expandable I/Os)
CPU 1214C has 14 integrated digital inputs and 10 digital outputs The number of input/output pins can be increased by adding additional signal modules to the right side of CPU.
Up to 8 digital or analog signal modules can be added to CPU 1214C. In our lab, we don’t have expanded signal modules.
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Communication Module
CPU 1214C has an integrated Ethernet interface, which support the PROFINET communication with PCs, HMIs, other CPUs , etc. Communication Module works like a hub or router, which provide multiple Ethernet ports to support multi-point communication.
Up to 3 communication modules can be added to any of the SIMATIC S7-1200 CPUs.
The RS485 and RS232 communication modules can also be added, which we don’t’ use in our lab and will not talk about in this lecture.
PROFINET is the open standard based on Ethernet widely used in industrial communications. You can find a lot of information on line.
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HMI(Human Machine Interface)
SIMATIC HMI KTP600 Basic Color Panel is connected with PLC CPU.
It has a 6 inch touch screen.
It has an Ethernet interface.
The user interface is programmable using TIA Portal.
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PC ME4447/6405
Wiring of basic PLC components in lab
Communication Module CPU Power Cable Ethernet Cable HMI George W. Woodruff School of Mechanical Engineering, Georgia Tech Power Supply
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ME4447/6405 Initially PLC was invented to directly replace relay control panels based on mechanical relays.
However, the power of PLC CPU make it possible to realize much more complicated controls than relay control panels.
The function of controller is defined by user program instead of wiring in the case of relay control panels.
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PLC Operating System
The operating system is a program that is needed for the basic operation of PLC.
It is located on the CPU of a PLC.
It serves as a bridge linking between the user program and the hardware.
It also controls the communication between PLC and programming device (e.g. uploading user program, online debugging). George W. Woodruff School of Mechanical Engineering, Georgia Tech
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User Program
User program is a program which is created by PLC programmer to solve certain control tasks. It is created with the help of programming device and uploaded to the PLC after compiling.
The Siemens TIA Portal (Totally Integrated Automation Portal ) is the programming environment where we can configure hardware and do the programming.
Three programming languages: Function Block Diagram (FBD) Statement List (STL) Ladder Logic (LAD) It’s easy to switch between different programming languages based on preference.
Ladder logic is a visual programming language, we will discuss it in detail later in this lecture.
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Cyclical Program Execution
After the user program is uploaded to PLC, the operating system cyclically processes the user program User programs and data are arranged in program blocks.
TIA portal will create a program block Main [OB1] automatically.
We start to program in OB1 and can create other blocks for better organization of programs.
OB1 is like the main function in C and is the entrance point of user programs.
The operating system cyclically execute the OB1 in a continuously running repeat loop.
This process is called cyclical program execution and each loop is a program cycle.
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Cyclical Program Execution cont’
Within each program cycle:
• • • • • Reads Input pins and updates Process Input Image Executes User Program Once ( OB1 ) Writes Process Output Image to Output pins Take care of system processes ( such as communications with other PLCs, updating user program, checking for STOP condition, etc..) Loop Back Update Process Input Image Execute User Program Update Output Pins Operating System
program cycle
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Cyclical Program Execution cont’
PLC loads the states of all inputs in its memory (Process Input Image) first in each program cycle ----Guarantee a constant signal state of inputs during the entire program cycle After completion of execution of user program, all output pins are updated simultaneously based on Process Output Image ----Guarantee all output states are resulting from the same set of input states If the user program is revised, the new program is written first to LOAD memory. In each program cycle, after updating output pins, the operating system will copy the new program to WORK memory from LOAD Memory. During the next scan cycle, the new user program will be executed ----Make it possible to upload new program to PLC during its running and without interrupting current program The minimum response time for changing inputs is one program cycle,
ME4447/6405 George W. Woodruff School of Mechanical Engineering, Georgia Tech
ME4447/6405 PLC’s logic control is defined by user program instead of hard wiring of relay control panels. Ladder Logic is a graphical programming language. The programming process involves dragging and dropping elements, arranging them and specifying their corresponding memories and parameters. In this section, we will first talk about how to address memories in PLC CPU. Then we will learn how to realize simple logical operations in PLC using Ladder Logic. George W. Woodruff School of Mechanical Engineering, Georgia Tech
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Memory Addressing
To address a bit of memory ___ ___ .
___ Memory Area Notation Byte Address To address a byte, word, or double word ___ ___ ___ Bit Number Memory Area Notation Size of Addressed Memory Notation Byte Address George W. Woodruff School of Mechanical Engineering, Georgia Tech
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Memory Addressing (continued)
Memory Area Notations: Notation I Q M PI PQ T C L DB Memory Area Process Image Input Process Image Output Bit Memory Peripheral Input ( Actual Input Pins) Peripheral Output ( Actual Output Pins) Timer Storage Area Counter Storage Area Local Memory of current Data Block Data Block Memory (Note: Advanced features such as Timers, Counters, Data
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Memory Addressing (continued)
Size of Addressed Memory Notations: Notation B Size of Addressed Memory Byte (8 bits) W D Word (16 bits) Double Word (32 bits) Byte Address: Each Memory Area is addressed in one byte increments starting at byte 0.
Bit Number: MSBit is 7 and LSBit is 0 George W. Woodruff School of Mechanical Engineering, Georgia Tech
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Memory Addressing (continued)
Examples: M1.3 (Note: only bit 3 of Marker Area byte 1) MD3 Bit Memory Area Byte 0 Byte 1 Byte 2 Byte 3 Byte 4 Byte 5 Byte 6 Byte 7 MB0 MW1 MD4 George W. Woodruff School of Mechanical Engineering, Georgia Tech
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Ladder Logic
A ladder logic program has a “ladder” look. The program is mapped in one or more networks.
On the left edge, the network contains one power rail.
Current flows from power rail to ground through each rung.
A rung is ended with a coil which is the result of logic operation of upstream elements on the same rung.
Network 1 %I0.1
“Button1”
%I0.2
“Button2”
%Q0.1
“LED1” George W. Woodruff School of Mechanical Engineering, Georgia Tech
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Ladder Logic
In a network, there is at least one rung from the power rail.
The power rail can be extended with several rungs and branches can be started from or close to any rung.
Inputs and outputs are stored in CPU memories.
Tags make the memory location meaningful to programmer.
Elements are dragged and dropped to rungs from tool box.
Network 1 %I0.1
“Button1”
%I0.2
“Button2”
%Q0.1
“LED1”
%Q0.2
“Motor”
%I0.3
“Button3”
%I0.4
“Button4”
%Q0.3
“LED1” George W. Woodruff School of Mechanical Engineering, Georgia Tech
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Ladder Logic : Basic Elements on Rungs
Normally Open Contact
Current can be passed when the corresponding memory bit has value “1”. Corresponding memory bit is specified above it.
Normally Closed Contact
Current can pass through it when the corresponding memory bit has value “0”. Corresponding memory bit is specified above it.
Coil
Corresponding memory bit will be set to “1” when current passes through it. Corresponding memory bit will be set to “0” when no current passes through it. Corresponding memory bit is specified above it.
Open Branch
Start a parallel branch from a rung.
Close Branch
Close a branch to a rung.
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Ladder Logic: “NOT” operation
Network 1 %I0.0
“Button”
%Q0.0
“LED”
I0.0
0 1
Q0.0
1 0 Drag and drop a
Normally Closed Contact.
Designate the corresponding memory bit as I0.0 (put “%” in front of global memory). “Button” is an example tag entered for this memory bit when a button is wired to PLC input pin associated with I0.0
Drag and drop a
Coil
to end the rung. Designate the corresponding memory bit as Q0.0. “LED” is an example tag entered for this memory bit when a LED is wired to PLC output pin associated with Q0.0
When I0.0 is set to 1, no current can flow to the coil, Q0.0 is set to 0. When I0.0 is set to 0, current can flow to the coil, Q0.0 is set to 1.
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Ladder Logic: “AND” operation
Network 1 %I0.0
“Button1”
%I0.1
“Button2”
%Q0.0
“LED”
I0.0
0 0 1 1
I0.1
0 1 0 1 Drag and drop two
Normally Open Contacts
and put them in series on a rung. Designate the corresponding memory bit as I0.0 and I0.1, respectively. Create any meaningful tag based on your application. Drag and drop a
Coil
to end the rung. Designate the corresponding memory bit as Q0.0. Create any meaningful tag based on your application. Only when both I0.0 and I0.1 are set to 1, current can flow to the coil and Q0.0 will be set to 1. Otherwise no current can flow to the coil, Q0.0 is set to 0.
Q0.0
0 0 0 1 George W. Woodruff School of Mechanical Engineering, Georgia Tech
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Ladder Logic: “OR” operation
Network 1 %I0.0
“Button1”
%I0.1
“Button2”
%Q0.0
“LED”
I0.0
0 0 1 1
I0.1
0 1 0 1 Drag and drop two
Normally Open Contacts
and put them in parallel and merging to one rung . Designate the corresponding memory bit as I0.0 and I0.1, respectively. Create any meaningful tag based on your application. Drag and drop a
Coil
to end the rung. Designate the corresponding memory bit as Q0.0. Create any meaningful tag based on your application. Only when both I0.0 and I0.1 are set to 0, no current can flow to the coil and Q0.0 will be set to 0. Otherwise current can flow to the coil, Q0.0 is set to 1.
Q0.0
0 1 1 1 George W. Woodruff School of Mechanical Engineering, Georgia Tech
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Ladder Logic: “XOR” operation
Network 1 %I0.0
“Button1”
%I0.0
“Button1”
%I0.1
“Button2”
%I0.1
“Button2”
%Q0.0
“LED”
I0.0
0 0 1 1
I0.1
0 1 0 1
Q0.0
0 1 1 0 Both I0.0 and I0.1 are controlling one
Normally Open Contact
and one
Normally Closed Contact.
The four elements are arranged as shown above, and finally merges to one
Coil
. Only when I0.0 and I0.1 are set differently, current can flow to the coil and Q0.0 will be set to 1. Otherwise no current can flow to the coil, Q0.0 is set to 0.
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ME4447/6405 PLC’s CPU can be used for more than relay logic as relay control panels. Ladder logic has advanced components that take advantage of the CPU. These components can be categorized as follows: Bit logic, Counters, Comparator, Convert, Math, Program control, Shift/Rotate, Timers, and so on. It is impossible to cover all of these components in this lecture. This section will first explain data types supported by PLC S7 1200. Then, only a few categories and examples of advanced components will be presented. All advanced components can be found in the instruction window of TIA portal and pressing
ME4447/6405 PLC support a wide variety of data types. The complete description is located at Programming a PLC->Creating a user program->Programming basics->Data types under the Contents tab in Help window. A screen capture is shown here.
We will extract some frequently used data types and present them here.
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BOOL:
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BYTE:
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WORD:
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DOUBLE WORD:
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SIGNED INTEGER:
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REAL:
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TIME
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Additional Bit Logic: Negate assignment
--( / )- Description:
The "Negate assignment" instruction inverts the result of logic operation (RLO) and assigns it to the specified operand. When the RLO at the input of the coil is "1", the operand is reset. When the RLO at the input of the coil is "0", the operand is set to signal state "1". The instruction does not influence the RLO. The RLO at the input of the coil is sent directly to the output of the coil.
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Additional Bit Logic: Set Output
--( S )- Description:
You can use the "Set output" instruction to set the signal state of a specified operand to "1".
The instruction is only executed if the result of logic operation (RLO) at the input of the coil is "1". If power flows to the coil (RLO = "1"), the specified operand is set to "1". If the RLO at the input of the coil is "0" (no signal flow to the coil), the signal state of the specified operand remains unchanged.
Executing the instruction does not influence the RLO. The RLO at the input of the coil is sent directly to the output of the coil.
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Additional Bit Logic: Reset Output
--( R )- Description:
You can use the "Reset output" instruction to reset the signal state of a specified operand to "0".
The instruction is only executed if the result of logic operation (RLO) at the input of the coil is "1". If power flows to the coil (RLO = "1"), the specified operand is reset to "0". If the RLO at the input of the coil is "0" (no signal flow to the coil), the signal state of the specified operand remains unchanged.
Executing the instruction does not influence the RLO. The RLO at the input of the coil is sent directly to the output of the coil. (can be used to reset timer) George W. Woodruff School of Mechanical Engineering, Georgia Tech
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Additional Bit Logic: Example
Button 1 connected to I0.0
Button 2 connected to I0.1
Button 3 connected to I0.2
%I0.0
“Button1” LED connected to Q0.0
Motor connected to Q0.1
Button 1 is pressed, LED is off; Button is released, LED is on.
Button 2 is pressed, turn on Motor and keep it on even if Button 2 is released.
Button 3 is pressed, turn off Motor and keeps it off even if Button 3 is released.
%Q0.0
“LED”
%I0.1
“Button2”
%I0.2
“Button3”
%Q0.1
“Motor”
S %Q0.1
“Motor”
R
There are other bit logic components available in PLC. If you are interested, you can explore them under the Bit logic category of the Instruction Window.
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Comparator Operations
Equal Not equal Greater or equal Less or equal Greater than Less than Value within range Value outside range … You can explore more under the Comparator Operations category of the Instruction Window.
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Equal operation:
Description:
You can use the "Equal" instruction to determine if a first comparison value (
If the condition of the comparison is fulfilled, the instruction returns the result of logic operation (RLO) "1". If the comparison condition is not fulfilled, the instruction returns RLO "0". The RLO of the instruction is logically combined with the RLO of the entire current path as follows: By
AND
, when the comparison instruction is connected in series.
By
OR
, when the comparison instruction is connected in parallel.
Specify the first comparison value (
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Equal operation example
Q0.0 is set to 1 only when both conditions are satisfied: I0.0 is 1;
And
MB0 equals 15.
%I0.0
MB0
INT
15 Q0.0
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Program control operations
Jump if RLO=1 Jump if RLO=0 Jump label Define jump list Jump distributor … You can explore more under the Program control Operations category of the Instruction Window.
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Jump if RLO=1
LABEL Description:
You can use the "Jump if RLO = 1" instruction to interrupt the linear execution of the program and resume it in another network. The destination network must be identified by a jump label (LABEL). The name of this jump label is specified in the placeholder above the instruction.
The specified jump label must be in the same block in which the instruction is executed. The name you specify can only occur once in the block. If the result of logic operation (RLO) at the input of the instruction is "1", the jump to the network identified by the specified jump label is executed. The jump direction can be towards higher or lower network numbers. If the condition at the input of the instruction is not fulfilled (RLO = 0), execution of the program continues in the next network. George W. Woodruff School of Mechanical Engineering, Georgia Tech
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Jump label
Description
You can use a jump label to identify a destination network, in which the program execution should resume when a jump is executed. The jump label and the instruction in which the jump label is specified must be located in the same block. The name of a jump label can only be assigned once in a block. George W. Woodruff School of Mechanical Engineering, Georgia Tech
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Jump if RLO=1 and Jump label example
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Math functions
Add Subtract Multiply Divide Return remainder of division Create 2’s complement Increment Decrement … You can explore more under the Math functions category of the Instruction Window.
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Add
Description:
You can use the "Add" instruction to add the value at input IN1 and the value at input IN2 and query the sum at output OUT (OUT = IN1+IN2).
In its initial state, the instruction box contains at least 2 inputs (IN1 and IN2). The number of inputs can be extended. The inserted inputs are numbered in ascending order in the box. When the instruction is executed, the values of all available input parameters are added. The sum is stored at the OUT output.
The instruction is only executed if the signal state is "1" at the EN enable input. If the instruction is executed without errors, the ENO enable output also returns the signal state "1".
The ENO enable output has the signal state "0" if one of the following conditions is fulfilled: Enable input EN has the signal state "0".
The result of the instruction is outside the range permitted for the data type specified at the OUT output.
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Add example
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Move operations
Move value Read field Write field Move Block … You can explore more under the Move operations category of the Instruction Window.
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Move value
Description:
You use the "Move value" instruction to transfer the contents of the operand at the IN input to the operand at the OUT1 output. The transfer is always made in
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Move value example:
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Timer operations
Generate pulse Generate on-delay Generate off-delay … You can explore more under the Timer operations category of the Instruction Window.
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Description:
The instruction "Generate on-delay" delays setting of the output Q by the programmed duration PT. The instruction is started when the result of logic operation (RLO) at input IN changes from "0" to "1" (positive signal edge). The programmed time PT begins when the instruction starts. When the duration PT expires, the output Q has the signal state "1". Output Q remains set as long as the start input is still "1". When the signal state at the start input changes from "1" to "0", the Q output is reset. The timer function is started again when a new positive signal edge is detected at the start input.
The current time value can be queried at the ET output. The time value starts at T#0s and ends when the value of duration PT is reached. The ET output is reset as soon as the signal state at the IN input changes to "0".
The execution of the "Generate on-delay" instruction requires a preceding logic operation. It can be
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Generate on-delay example
I0.0 is set to “1”; 1 second later, M0.1 is set to “1”.
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Word Logic operations
“ AND” “OR” “XOR” Create 1’s complement … You can explore more under the Word Logic operations category of the Instruction Window.
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“AND” word logic operation
Description:
You can use the "AND logic operation" instruction to combine the value at the IN1 input and the value at the IN2 input bit-by-bit by AND logic and query the result at the OUT output. The number of inputs can be expanded in the instruction box. The added inputs are numbered in ascending order in the box. When the instruction is executed, the values of all available input parameters are combined with AND logic. The result is stored in the OUT output.
The instruction is only executed if the signal state is "1" at the EN enable input. In this case, the ENO output also has the signal state "1".
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“AND” word logic operation example
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