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Lecture 6
1
SoC
(System On a Chip) The electronics for a
complete, working product contained on a
single chip
Complex functionalities that previously
required heterogeneous components to be
connected on a PCB, are integrated within
one single silicon chip
2
SoC: Evolution
Technologies implementing embedded systems
evolved from micro-controllers and discrete
components to fully integrated SoCs
Reason: advances in silicon process technology
enabling a complete system to be designed into
one or few integrated devices
Space and Power reductions
Increased Performance
3
Features of SoC
Typically SoC incorporates
A programmable processor
On-chip memory
Accelerated Functional Units (e.g., Digital Encryption
Standard block, MPEG2 decoder)
Peripheral devices
Often mixed technology designs integrating
Analog, RF Components
Micro-electro-Mechanical Systems (MEMS)
Optical input/output
4
SoC Design
Time and design effort required to integrate different
types of components on a chip: a bottleneck for SoC
evolution
Design reuse to reduce time to market
Use of parts from previous designs
Making use of parts designed by third parties
Hardware and Software component model!
All for PROVEN and tested solutions, avoiding redesign and re-verification of real-time hardware and
real-time software
5
SoC Design Flow (traditional)
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SoC Design Cycle
Requirements capture
Sign-off
Global testing
(Initial) specification
Architectural division
IP component
reuse
Integration
Component design
/ programming
Component testing
libraries
Implementation
7
Simulation models
Sometimes physical prototypes, sometimes software
approximation of desired system
Very helpful for:
Tuning the specification (runs faster than full implementation)
Predicting the system’s behavior and suggesting tests
Performing crude early analysis of performance and
dimensioning
But:
No relation guaranteed between simulation and further
implementation
Not meant for code production
Formalisms: Matlab/Simulink, SystemC/C++,…
8
SoC Design Abstractions
ESL Design
User functional level description
C/C++, SystemC + TLM, Simulink, Matlab, UML.
RTL Design
Converts user specification into register level
description.
Describes exact behavior of the chip, with I/O cxns.
Verilog, VHDL, SystemC(!)
Physical Design
Takes the RTL + library of available logic gates
Defines places for gates + wires them
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IP-based Design
Intellectual Property Cores
Parameterized components with standard interfaces facilitating
high level synthesis
Cores available in three forms
Hard
Black-box in optimized layout form and encrypted simulation
model. Example: microprocessors
Firm
Synthesized netlist which can be simulated and changed if
needed
Soft
Register transfer level (RTL) HDLs; user is responsible for
synthesis and layout
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Platforms
Embedded Applications built using
Common architectural blocks and
Customized application specific components
Common architectures
Processor, memory, peripherals, bus
structures
Common architectures and supporting
technologies (IP libraries and tools) together
called as platforms or platform-based designs
Latest trend in the Embedded Systems
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Platform-based SoC
Platform-based SoCs are systems embedded on
a chip that contain
IP blocks like embedded CPU, embedded
memory,
Real-world interfaces (e.g., PCI, USB),
Mixed signal blocks and
Software components
Device drivers, real-time operating systems and
application code
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Classes of Platforms
1. Full Application Platforms
Platforms that let derivative product designers
create applications on top of hardwaresoftware architectures
A set of hardware modules
Example: Complex dual processor architecture
with hierarchical bus system tailored to a specific
product’s requirements
A layer of firmware and driver software
Examples: Philips’ Nexperia, TI’s OMAP
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Classes of Platforms (2)
2. Processor Centric Platforms
Typically centered on specific processors
Key software services like real-time OS kernel made
available through libraries
Examples: ARM Micropack, ST Microelectronics ST100
3. Communication Centric Platforms
Communication fabric optimized for specific application
Fabrics often bundled with specific processors
Examples: ARM AMBA, IBM CoreConnect bus
architecture
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Classes of Platforms (3)
4. Configurable (Programmable) platforms
Programmable logic added to the platform
allows consumers to customize using both
hardware and software
Field programmable gate array (FPGA) added
to hard-coded processor centric platforms
Examples: Altera Excalibur platform with ARM
cores, Xilinx Vertex II Pro
15
Multi-processor SoC (MPSoC)
Full application platform
Multiple processors
CPUs, DSPs, etc.
Hardwired blocks
Mixed-signal
Custom memory system
Lots of software
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Philips Nexperia
Also a full application platform
Multimedia applications: set-top box, etc.
2 CPUs, 3 busses, several accelerators,
I/O devices.
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Assignment
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Philips Nexperia
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TI OMAP
Targets
communications,
multimedia.
ARM11
+ VFP
TMS320C55x
DSP
Multiprocessor
2D/3D
Graphics
Accelerator
Imaging &
Video
Accelerator
(IVA)
Memory
Controller
Internal
SRAM
Peripherals
Security
Camera
I/F
LCD
I/F
Video
Out
L4 Interconnect
L3 Interconnect
with DSP, RISC
OMAP2420
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ST Nomadik
Targets mobile multimedia.
A multiprocessor-of-multiprocessors.
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Open Multimedia
Applications Platform
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OMAP
OMAP Application processor has a dual-
core architecture: ARM9 + TMS320C55
OMAP design chain includes
Software IPs: OMAP supports several
RTOS’s to suit different applications
Application and Middleware: Ported
applications and middleware like MPEG4 decoding and audio playback
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Design Chain for OMAP
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OMAP Hardware Architecture
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OMAP Hardware Architecture
ARM RISC core is well suited for control
code (OS, User Interface, OS applications)
DSP best suited for signal processing
applications like video, speech processing,
audio
Power efficient because signal processing
task on DSP consumes much less power
than on ARM
26
Example Application
Video-conferencing
C55x DSP can process in real-time full video
conferencing application (audio and video at
15 images/sec) using only 40% of the
available computational capability
Can manage other applications concurrently
ARM processor can handle OS operations and
other OS applications (may be Word, Excel,
etc.)
Less power consumption on the whole
27
Peripherals
Includes numerous interfaces to connect
peripherals or external devices from either the
DSP or GPP
Some interfaces
Camera and Display interface
Serial unidirectional compact camera port, 8-bit
parallel interface, 8/16 bit bi-directional display
interface, OMAP internal LCD controller
Several Serial interfaces
SPI, McBSP, I2C, USB, UART
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Software Architecture
Defines an interface scheme that allows
GPP to be the system master
Called the DSP/BIOS Bridge
DSP/BIOS Bridge provides
communications between GPP tasks and
DSP tasks
High level application developers use a set
of DLLs and drivers
29
OMAP2
Includes multiple engines executing multiple tasks
An ARM 11 based microprocessor runs the OS and
performs supervisory control
DSP core focuses on audio codecs, echo cancellation
and noise suppression
3D graphics engine enables sophisticated graphics
rendering
Video/imaging accelerator handles streaming MPEG4
video and mega-pixel resolution camera
Digital baseband processor implements network
communications as a cellular modem handling voice and
data
30
OMAP 2 Architecture
31
OMAP2
All blocks operate simultaneously
No degradation in quality of any service
Devices remain highly responsive
To conserve power each of these
subsystems can be shut down when not
used
SoC suited for implementation of Smart
Phone
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Digital Media Processor
Functionalities expected in a portable media system
Live preview: Capture, process, display
Live video capture: Compresses
Live image capture: Compresses
Live audio capture: Compresses
Video decode/playback
Still image decode/display
Audio decode/playback
Photo printing
Several of these modes operate concurrently
33
DM 310 Media Processor
Four subsystems: imaging/video, DSP, coprocessor,
ARM core
Imaging/Video system: CCD controller, preview engine,
onscreen display, video encoder
DSP: TMS32054X operating at 72MHz (Max.) performs
bulk of audio/image/video processing operations
Co-processors: SIMD engine (8 or 16 bit), Quantization,
Variable length coder working concurrently
ARM Core: manages system level tasks, controls all
components on chip except DSP and its co-processor
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TMS320DM310 Architecture
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Application: Still Camera Engine
36
37
Configurable SoC
Consisting of
Processor
Memory
On-chip reconfigurable hardware parts for
customization to application
Towards application specific programmable
products
38
FPGA-based RC
Programmable fabric that can be dynamically
reconfigured
Mapping to FPGA
Only the time consuming computations are
mapped
Computation expressed in HDL
Structure
FPGA + Memory
39
Programmable Platforms
Several products
incorporate
microprocessor
and FPGA on
one chip
40
Triscent A7 SoC
CSL:
performs
basic
combinational
and
sequential
logic functions
41
Configurable processors
Configurability:
Processor parameters (cache size,
registers, etc.)
Instructions
Result:
HDL model for processor.
Software development environment.
42
Summary
We have learnt about SoC.
Understood the design process of SoCs.
Overviewed various types of platforms
Looked at OMAP in some detail
Got an introduction to the concept of
reconfigurable computing & ASIPs.
43