Transcript Digital Logic Design

Digital Logic & Design
Dr. Waseem Ikram
Lecture 01
Analogue Quantities
Continuous Quantity

Intensity of Light
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Temperature

Velocity
Digital Values

Discrete set of values
Continuous Signal
45
40
temperature 0C
35
30
25
20
15
10
5
0
1
2
3
4
5
6
7
8
time
9
10
11
12
13
14
15
Continuous Signal
45
42
40
temperature 0C
35
35
34
41
37
30
29
25
25
20
25
23
22
18
15
10
7
5
1
0
1
4
2
2
3
4
5
6
7
8
time
9
10
11
12
13
14
15
Digital Representation
45
42
40
temperature 0C
35
35
34
41
37
30
29
25
25
20
25
23
22
18
15
10
7
5
1
0
1
4
2
2
3
4
5
6
7
8
9
samples
10
11
12
13
14
15
Under Sampling
45
40
temperature 0C
35
30
25
20
15
10
5
0
1
3
5
7
9
samples
11
13
15
Electronic Processing
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Analogue Systems
Digital Systems
Representing quantities in Digital Systems
Representing Digital Values
39 0C ?
8
GND
a4
4
a3
3
0
b4
7
b3
6
b2
a2
2
a1
1
6.25 x 1018 ?
39mV
1mV = 1
Vcc1
0
b1
5
Digital
System
6.25 x 1015 V !!
Digital Systems
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Two Voltage Levels
Two States
 On/Off
 Black/White
 Hot/Cold
 Stationary/Moving
Binary Number System
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Binary Numbers
Representing Multiple Values
Combination of 0v & 5v
Merits of Digital Systems
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Efficient Processing & Data Storage
Efficient & Reliable Transmission
Detection and Correction of Errors
Precise & Accurate Reproduction
Easy Design and Implementation
Occupy minimum space
Information Processing
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Numbers
Text
Formula and Equations
Drawings and Pictures
Sound and Music
Logic Gates
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Building Blocks
AND, OR and NOT Gates
NAND, NOR, XOR and XNOR Gates
Integrated Circuits (ICs)
Logic Gate Symbol and ICs
NAND Gate IC
GND
6
5
4
3
2
7400
1
XNOR Gate
8
9
XOR Gate
10
NOR Gate
11
NAND Gate
12
NOT Gate
13
OR Gate
Vcc
AND Gate
Combinational Circuits
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Combination of Logic Gates
Adder Combinational Circuit
Adder Combinational Circuit
Sum
Carry
Functional Devices
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Functional Devices
 Adders
 Comparators
 Encoders/Decoders
 Multiplexers/Demultiplexers
Sequential Circuits
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Memory Element
Current & Previous State
Flip-Flops
Counters & Registers
Block Diagram of a Sequential Circuit
Input
1
2
1
a1
a2
b1
Combinational
Logic Circuit
a1
b2
b1
Memory Element
5
6
5
Output
Programmable Logic Devices (PLDs)
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Configurable Hardware
Combinational Circuits
Sequential Circuits
Low chip count
Lower Cost
Short development time
Memory
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Storage
RAM (Random Access Memory)
 Read-Write
 Volatile
ROM (Read-Only Memory)
 Read-Only
 Non-Volatile
A/D & D/A Converters
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Processing of Continuous values
Conversion
 Analogue to Digital A/D
 Digital to Analogue D/A
Industrial Control Application
Digital Industrial Control
Digital
*/*
x1
u1
A/D
Converter
Controller
Thermocouple
Reaction
Vessel
Heater
Control
*/*
x1
u1
D/A
Converter
Summary
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Continuous Signals
Digital Representation in Binary
Information Processing
Logic Gates
Summary
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Combinational & Sequential Circuits
Programmable Logic Devices (PLDs)
Memory (RAM & ROM)
A/D & D/A Converters
Number Systems and Codes
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Decimal Number System
Caveman Number System
Binary Number System
Hexadecimal Number System
Octal Number System
Decimal Number System
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Ten unique numbers 0,1..9
Combination of digits
Positional Number System
275 = 2 x 102 + 7 x 101 + 5 x 100
 Base or Radix 10
 Weight 1, 10, 100, 1000 ….
Representing Fractions
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Fractions can be represented in decimal number
system in a manner
= 3 x 102 + 8 x 101 + 2 x 100 + 9 x 10-1
+ 1 x 10-2
= 300 + 80 + 2 + 0.9 + 0.01
= 382.91
Caveman Number System
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∑, ∆, >, Ω and ↑
Base – 5 Number System
∆Ω↑∑ = 220
Caveman Number System
Decimal Number
Caveman Number
Decimal Number
Caveman Number
0
∑
10
>∑
1
∆
11
>∆
2
>
12
>>
3
Ω
13
>Ω
4
↑
14
>↑
5
∆∑
15
Ω∑
6
∆∆
16
Ω∆
7
∆>
17
Ω>
8
∆Ω
18
ΩΩ
9
∆↑
19
Ω↑
Caveman Number System
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Mr. Caveman is using a base 5 number system.
Thus the number ∆Ω↑∑ in decimal is
= ∆ x 5 3 + Ω x 5 2 + ↑ x 51 + ∑ x 5 0
= ∆ x 125 + Ω x 25 + ↑ x 5 + ∑ x 1
= (1) x 125 + (3) x 25 + (4) x 5 + (0) x 1
= 125 + 75 + 20 + 0 = 220
Binary Number System
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Two unique numbers 0 and 1
Base – 2
A binary digit is a bit
Combination of bits to represent larger values
Binary Number System
Decimal Number
Binary Number
Decimal Number
Binary Number
0
0
10
1010
1
1
11
1011
2
10
12
1100
3
11
13
1101
4
100
14
1110
5
101
15
1111
6
110
16
10000
7
111
17
10001
8
1000
18
10010
9
1001
19
10011
Combination of Binary Bits
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Combination of Bits
100112 = 1910
= (1 x 24) + (0 x 23) + (0 x 22) + (1 x 21)
+ (1 x 20)
= (1 x 16) + (0 x 8) + (0 x 4) + (1 x 2)
+ (1 x 1)
= 16 + 0 + 0 + 2 + 1
= 19
Fractions in Binary
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Fractions in Binary
1011.1012 = 11.625
= (1 x 23) + (0 x 22) + (1 x 21) + (1 x 20)
+ (1 x 2-1) + (0 x 2-2) + (1 x 2-3)
= (1 x 8) + (0 x 4) + (1 x 2) + (1 x 1)
+ (1 x 1/2) + (0 x 1/4) + (1 x 1/8)
= 8 + 0 + 2 + 1 + 0.5 + 0 + 0.125
= 11.625
Floating Point Notations
Decimal-Binary Conversion
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Binary to Decimal Conversion
 Sum-of-Weights
 Adding weights of non-zero terms
Decimal to Binary Conversion
 Sum-of-Weights (in reverse)
 Repeated Division by 2
Decimal to binary conversion using
Sum of weight
Number
Weight
Result after subtraction
Binary
392
256
392-256=136
1
136
128
136-128=8
1
8
54
0
8
32
0
8
16
0
8
8
0
4
0
0
2
0
0
1
0
8-8=0
1
Decimal-Binary Conversion
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Binary to Decimal Conversion
 Sum-of-Weights
 Adding weights of non-zero terms
100112
(1 24 )  (0  23 )  (0  22 )  (1 21 )
(1 2 )
0
Terms 16,0,0.2 and 1
19
Decimal-Binary Conversion

Binary to Decimal Conversion
 Sum-of-Weights
 Adding weights of non-zero terms
Decimal-Binary Conversion

Binary to Decimal Conversion
 Sum-of-Weights
 Adding weights of non-zero terms
100112  16  2  1  19
1011.1012  8  2  1  1
2
8
 11  5
8
 11.625
Lecture No. 1
Number Systems
A Summary