Transcript Lecture CMOS - Center for Detectors

Detectors
RIT Course Number 1051-465
Lecture CMOS Detectors
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Aims for this lecture
• To describe CMOS hybrid and monolithic detectors
– physical principles
– operation
– and performance of CMOS detectors
• Given modern examples of CMOS detectors
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Lecture Outline
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CMOS detector definition
CMOS detector principles of operation
Performance of modern CMOS detectors
Examples of CMOS detectors
Historical context of CMOS detectors
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CMOS Detector Architectures
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CMOS Detector Definition
• CMOS detectors are made of complimentary MOSFET
circuits connected to light-sensitive materials.
• The voltage change due to integrated photogenerated charge is
generally sensed directly through a source follower amplifier
in each pixel, instead of via a charge transfer process, i.e. in
CCDs.
• Charge is sensed as a voltage directly in the pixel and is not
reset every time it is sensed, unlike in a CCD.
• The readout circuit is often called a “multiplexer” because it
can sequentially direct signals from multiple pixels to an
individual output amplifier.
• Historically, they have been developed later than CCDs, and
first for infrared astronomy detectors.
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CMOS vs. CCD Readout
• CMOS has “direct readout (DRO)” random access
architecture.
• (Note that the CMOS device in the figure has readout circuitry
that takes up some real estate – it is frontside illuminated,
producing non-ideal fill factor.)
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CMOS Detector Types
• Monolithic (“one piece”)
– readout and photodiode integrated in same part, which means that light
sensitive layer is made of silicon (only sensitive to optical photons)
– frontside or backside illuminated
– can be made with mostly standardized CMOS processes that are
common to the commercial semiconductor industry
• Hybrid (“two pieces”)
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readout circuit is separate from photodiode
readout is made of silicon
photodiode is made of semiconductor with suitable cutoff wavelength
requires many custom steps
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Hybrid Architecture
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Hybrid Array Benefits
• Hybrid arrays are used when one wants to detect light of
wavelengths that are not absorbed by silicon, i.e. wavelengths
beyond ~1um.
• Infrared arrays are “hybrids” – they use one material to detect
light and silicon for the readout circuit.
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Hybrid Array Detection Flow
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Hybrid Array Architecture
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Hybrid Array Bonding
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Hybrid Array Summary
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Hybrid Array Key Technologies
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CMOS Hybrid Detector Example: InSb Array
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CMOS Hybrid Detector Example: NICMOS Array
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Infrared Hybrid Array Substrate Removal
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Readout Integrated Circuit (ROIC)
also known as the Multiplexer
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Detector Unit Cell
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Detector Multiplexer
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Detector Operation
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NICMOS MUX
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Light-sensitive Materials
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Periodic Table
• Semiconductors occupy column IV of the Periodic Table
• Outer shells have four empty valence states
• An outer shell electron can leave the shell if it absorbs enough
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energy
Periodic Table Continued
• The column number gives the number of valence electrons per
atom. Primary semiconductors have 4.
• Compounds including elements from neighboring columns can
be formed. These alloys have semiconductor properties as well
(e.g. HgCdTe & InSb).
• Mercury-cadmium-telluride (HgCdTe; used in NICMOS) and
indium-antimonide (InSb; used in SIRTF) are the dominant
detector technologies in the near-IR.
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The Band Gap Determines the Red Limit
E G  hc 
hc
c
.
(1)
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Performance
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Dark Current
• Dark current is the signal that is seen in the absence of any
light.
• The dominant components are diffusion across the pn junction,
thermal generation-recombination (G-R) of charges within the
bulk of the semiconductor, and leakage currents typically
through surfaces.
• Dark current adds an effective noise due to the shot noise of
the dark charge.
• Dark current can be reduced by cooling.
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Dark Current Example
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Dark Current vs. Temperature
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Read Noise
• Read noise is the uncertainty in the signal measurement due to
electrical fluctuations produced by the detector.
• For CMOS devices, it is due to:
– Johnson noise of FETs
– random telegraph signal (a.k.a. popcorn noise) in the output FET
– interface states at material surfaces
• Typical read noise values for CMOS devices are around 10
electrons.
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Read Noise Example
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Sampling Schemes
• By being a bit clever about reading out the array, one can
minimize or eliminate some of these noise modes.
• During an exposure, typically each pixel is sampled several
times.
• The most common approaches are correlated double sampling
(CDS), multiple non-destructive reads (aka “Fowler
Sampling”), & fitting a line (aka “up the ramp”).
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Fowler Sampling
1 N
1 N
V   Vi j   Vf j
N j 1
N j 1
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“Up the Ramp”
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Fit best line to multiple non-destructive samples.
Sample spacing does not need to be uniform.
Not clear whether this or Fowler sampling is best.
This is what is done in NICMOS MULTIACCUM mode.
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Hybrid Array Optimization – Quantum Efficiency
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Well Depth and Non-linearity
• Well capacity is defined as the maximum charge that can be
held in a pixel.
• “Saturation” is the term that describes when a pixel has
accumulated the maximum amount of charge that it can hold.
• The “full well” capacity in a CCD is typically a few hundred
thousand electrons per pixel for today’s technologies.
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Well Depth and Non-linearity Example
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Non-linearity Example
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Persistence
• Persistence is the afterimage that a detector can produce if it
traps charge from a previous exposure and releases it during
the current exposure.
• It is produced by charge traps.
• Charge traps will decay with an exponential timescale.
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Persistence Example
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Persistence Movie
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Pixel-to-pixel Crosstalk
• Crosstalk is the generic term that describes signal
contamination due to the presence of a signal in another pixel
or electrical channel.
• Charge diffusion from one pixel to a neighbor is an important
crosstalk mechanism in IR arrays and CCDs.
• Once charge carriers are created, their motion is governed by
charge diffusion.
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IPC
• Interpixel capacitance (IPC) is a form of crosstalk.
• In this case, charge in a pixel induces a voltage change in a
neighbor, just like the behavior between parallel plates in a
capacitor.
• The effect is to blur the point spread function.
• The induced voltage does not have noise.
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IPC
• In this example, IPC is very large for the H4RG SiPIN device
(10 um pixel size).
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Arrays in Use Today
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Teledyne H4RG Si PIN
• This is an image of the H4RG device in the Rochester
Imagingn Detector Laboratory (RIDL).
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Raytheon Family Arrays
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Hybrid Visible Silicon Imager - HyViSI
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HyViSI
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HyViSI
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Modern Array Examples
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History of Hybrid Infrared Arrays
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History of Infrared Detection
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Herschel’s detection of IR from Sun in 1800
Johnson’s IR photometry of stars (PbS) mid 60’s
Neugebauer & Leighton: 2mm Sky Survey (PbS), late 60’s
Development of bolometer (Low) late 60’s
Development of InSb (mainly military) early 70’s
IRAS 1983
CMOS Hybrid Arrays (InSb, HgCdTe, Si:As IBCs) mid-80’s
NICMOS, 2MASS, IRTF, UKIRT, KAO, common-user instruments,
Gemini, etc.
• JWST
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Science Motivation
• Exploration & discovery
– Neugebauer, Leighton, Low, Fazio, Townes
• Technological opportunities
– Bolometer (Low), PbS (Neugebauer), balloons (Fazio), IR lasers &
interferometry (Townes)
• A few, key problems
– Bolometric luminosities (Herschel, Johnson)
– The Galactic Center (Becklin)
– Star formation
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