Transcript SERC RT21 - Georgia Tech Engineering Information Systems Lab

Presentation for OMG Systems Engineering Domain Special Interest Group (SE DSIG)
December 7, 2010 - Santa Clara, CA
Systems Engineering Research Center (SERC) Overview
and
SERC RT21 Effort:
Verification, Validation, and Accreditation Shortfalls
for Modeling and Simulation
Overview of GIT Aspects:
A SysML Model-Based Approach for M&S VV&A
Russell Peak (PI)
Georgia Institute of Technology
Model-Based Systems Engineering Center
www.mbse.gatech.edu
All material is copyrighted © by Georgia Tech unless otherwise noted. Permission to use for non-commercial
purposes (including internal industry usage) is hereby granted only if a proper citation is given.
Contents
• SERC Overview
– Highlights from Art Pyster
presentation at Annual SERC
Research Review (ASRR)
Nov 2010 - www.sercuarc.org
• SERC RT21 Overview – GIT Effort
– See also RT21 presentation at ASRR for additional RT21
material: DoD motivation/context, UA Huntsville AADL effort
2
Excerpts included here.
- See SERC ASRR 2010
website for full version
- www.sercuarc.org
Systems Engineering Initiatives for
Verification, Validation and Accreditation
of DoD Models and Simulations
Philomena M. Zimmerman
Deputy Director, Modeling, Simulation & Analysis
ODDR&E/Systems Engineering/Systems Analysis
Systems Engineering Research Center
November 9, 2010
SERC Annual Review
Nov 2010 Page-3
Acquisition Community-led
VV&A High Level Task (HLT) Summaries
V-AQ-2: “Risk Based Methodology for Verification, Validation and
Accreditation (VV&A)” The degree of VV&A required is explicitly tied to
both M&S use and the user risk incurred if the M&S does not provide
accurate results. A methodology that tailors VV&A planning and
implementation based on known risk factors will provide a framework in
which VV&A implementation trade-offs can be made, information/fidelity
requirements can be assessed, and a VV&A cost model can be
developed.
V-C-2: “Improving VV&A Implementation” Increase VV&A
implementation and enhance M&S credibility by transforming VV&A
practices from current subjective methods into objective examples or use
cases. Explore emerging technologies, standards, and applicable
methods that could be applied to reduce costs, schedule, and improve
reuse.
SERC Annual Review
Nov 2010 Page-4
Improved Decision Support Quality
through a Balanced Approach
VV&A
Strategy
SERC RT21 efforts:
- GIT: SysML-based approach
- UA Huntsville: AADL approach
SERC Annual Review
Nov 2010 Page-5
Contents: SERC RT21 – GIT Effort
• Primary Content
– Project VV&A objectives
– Process being used
– Products being produced
– Progress update
• Summary
• Additional Background Material
6
Project VV&A Objectives – GIT Focus
per updated scope 2010-07-20
• Primary objective
– Demonstrate how to address VV&A gaps by applying
SysML and MBSE technology
– Show in particular how VV&A can be more embedded and automated
throughout the system lifecycle
• Supporting sub-objectives (via “quick-look” approach)
– Apply known modeling & simulation (M&S) patterns
and develop new patterns where needed
– Demonstrate approach by extending existing testbeds and examples
(excavator testbed – next slide, other examples, ...)
– Provide basis for developing future DoD-specific testbeds
• Terminology
– SysML is the Systems Modeling Language (www.omgsysml.org), which
has been called “the new global language of 350K+ systems engineers”
(amazon.com)
– MBSE is model-based systems engineering (vs. document-centric approach)
4/13/2015
7
7
The 4 Pillars of SysML
Automotive Anti-Lock Braking System Example
1. Structure
2. Behavior
sd ABS_ActivationSequence [Sequence Diagram]
stm TireTraction [State Diagram]
m1:Brake
d1:Traction
Modulator
Detector
LossOfTraction
detTrkLos()Gripping
sendSignal()
interaction
state
machine
Slipping
activity/
function
RegainTraction
modBrkFrc(traction_signal:boolean)
modBrkFrc()
definition
use
sendAck()
3. Requirements
Copyright © Georgia Tech and InterCAX. All Rights Reserved.
4. Parametrics
SysML and MBSE: A Quick-Start Course
8
GIT Project Team – RT21
• Research Professionals
– Selcuk Cimtalay, PhD
– Russell Peak, PhD (PI)
– Andy Scott
– Miyako Wilson
• Undergraduate Research Assistants
– Brian Aikens
– Drew Martin
9
Contents: SERC RT21 – GIT Effort
• Primary Content
– Project VV&A objectives
– Process being used
– Products being produced
– Progress update
• Summary
• Additional Background Material
10
Process Being Used (p1/2)
Guiding Philosophy
• Enabling bottom-up/top-down hybrid approach
– Iterative ubiquitous VV&A; building block VV&A
– Software V&V techniques applied to systems
(continuous integration/builds, junit, ...)
• Analogies:
(a) Making pizza ...
(b) “For want of a (VV&A’ed) nail ...”
http://en.wikipedia.org/wiki/For_Want_of_a_Nail_(proverb)
11
Process Being Used (p2/2)
GIT RT21 Project Plan
• Leverage existing examples
– Illustrate technical approach in quick-look fashion
– Add VV&A-oriented extensions where needed
• Demonstrate sample VV&A use cases along
multiple system dimensions:
– system levels, tools, methods, lifecycle phases, ...
• See next slides for Project Plan specifics
12
Contents: SERC RT21 – GIT Effort
• Primary Content
– Project VV&A objectives
– Process being used
– Products being produced
– Progress update
• Summary
• Additional Background Material
13
Products Being Produced
• Deliverable D01 - Presentation & Live Demos (1/2011)
1] – Current VV&A
aspects:
–[List
Selections
from
these and others:





automated requirements verification
embedded unit tests
automated roll-up of unit tests results
automated roll-up of multi-level test results
“model DNA” user interaction for intuitive visual inspection
to aid model comprehension, debugging, ...





automated units consistency
other built-in checking per SysML spec
automated equation checking
other built-in checking added by SysML tools
leveraging built-in checking by solvers / external tools
wrapped in a SysML context (e.g., Mathematica detecting
overconstraints)
• Deliverable D02 - Phase 1 Final Report (1/2011) with:
– Concepts (above aspects, patterns, SysML basis, ...)
– Examples (per previous slides)
– Proposed next steps for DoD applications
14
Activity 2a Progress
Leveraging existing capabilities/examples
status as of 2010-12-13
(with completed examples listed)
# VV&A Concept
Example(s)
1 automated units consistency
2 other built-in checking per SysML spec
MagicDraw SysML detecting units mismatch.
Model integrity (e.g., type checking); naming updates;
instance updates; etc.
ParaMagic detecting wrong parameter name.
MagicDraw test suite; ParaMagic test suite
Mathematica detecting overconstrained system of
equations.
3 automated equation checking
4 other built-in checking added by SysML tools
5 leveraging built-in checking by solvers / external tools
wrapped in a SysML context
6 automated requirements verification
7 embedded unit tests
8 automated roll-up of embedded unit tests (basic multi-level test)
9 automated roll-up of embedded multi-level tests
10 “DNA signature” - user interaction with model for intuitive visual
inspection to aid model comprehension, V&V, debugging, ...
a0. Descriptive Resources
(Authoring Tools, ...)
MCAD Tools
NX
d0. Simulation Building Block
Libraries
Cost
Concepts
Optimization
Concepts
Reliability
Concepts
Solid
Mechanics
Queuing
Concepts
Fluid
Mechanics
Data Mgt. Tools
c0. Context-Specific
Simulation Models
Excavator Sys-Level Models
Optimization Model
Objective
Function
Cost
Model
Excel
b0. Federated
Descriptive Models
Excavator Domain Models
e0. Solver Resources
Optimizers
ModelCenter
Generic Math Solvers
Reliability
Model
Excel
Dig Cycle
Model
Mathematica
Federated Excavator Model
System & Req Tools
RSD/E+
Operations
...
MagicDraw
Req. &
Objectives
Boom Linkage Models
Boom
Extensional
Linkage Model
Linkages
Dump Trucks
Sys Dynamics Solvers
Stress/Deformation Models
Plane Stress
Linkage Model
Dymola
FEA Solvers
Ansys
Factory Domain Models
Federated Factory Model
Factory CAD Tools
FactoryCAD
Req. &
Objectives
Excavator
MBOM
Assembly Lines
AGVs
Buffers
Work Cells
Machines
Boom Mfg. Assembly Models
Assembly Process Models
MM1 Queuing
Assy Model
Discrete Event
Assy Model
Discrete Event Solvers
(Specialized)
eM-Plant /
Factory Flow
Legend
Tool & native model interface (via XaiTools, APIs, ...)
Parametric or algorithmic relationship (XaiTools, VIATRA, ...)
Composition relationship (usage)
Native model relationship (via tool interface, stds., ...)
Dig Site
Hydraulics
Subsystem
Notes
1) The pattern names and identifiers used here conform to HMX 0.1 — a method
under development for generalized system-simulation interoperability (SSI).
2) All models shown are SysML models unless otherwise noted.
3) Infrastructure and middleware tools are also present (but not shown) --e.g.,
PLM, CM, parametric graph managers (XaiTools etc.), repositories, etc.
Main Test Cases (for Activities 2 and 3)
- Excavator test bed with linkage systems
- FireSat / NGDMC
- Home heating system
- Mobile robot
- Short course tutorials
FireSat, SimpleSat, etc. (parametrics, margin, ...)
LinkageSystems, build block libraries, ...
LinkageSystems, HomeHeatingSystem
Combining above, ...
LinkageSystems, NGDMC, etc. (and above)
2008-02-20
15
Activity 3a Progress
Extending capabilities/examples and creating new ones
status as of 2010-12-13
(with completed examples listed)
# VV&A Concept
Example(s)
11 automated tool/solver verification
a Core math solvers: Mathematica, OpenModelica, Matlab SMT
12 automated verification tests on external simulation/analysis models
a System dynamics: Matlab/Simulink
b FEA: Ansys
13 automated verification tests on external design/descriptive models
a Spreadsheets: Excel
b CAD: NX
c System mission design: STK
14 automated verification tests on physical systems:
a activity-based test scripts with mobile robot
Main Test Cases (for Activities 2 and 3)
- Excavator test bed with linkage systems
- FireSat / NGDMC
- Home heating system
- Mobile robot
- Short course tutorials
SpringSystems unit test case
HomeHeatingSystem
LinkageSystems
wip
wip
wip - satellite orbit / trajectory design
wip
Object2
end location
Object1
end location
ra1 = ?
ra2 = ?
Object1
target location
rt1= 30”
(anywhere on this circle)
Object1
start location
45
Object2
start location
de
g,
12
”
”
, 14
deg
60
Object2
target location
rt2 = 30”
(anywhere on this circle)
16
Contents: SERC RT21 – GIT Effort
• Primary Content
– Project VV&A objectives
– Process being used
– Products being produced
– Progress update
• Summary
• Additional Background Material
17
Selected Examples: FireSat / NGDMC
Sources: INCOSE SSWG and InterCAX LLC; Georgia Tech ASE 6006
18
Requirements Verification
via FireSat SysML model
“DNA signature” auto-generated
from SysML parametrics model
Model source: [email protected]
19
Selected Examples: LinkageSystems
verification pattern: unit test
(two SysML diagrams of to visualize same content)
(A) system design being verified
(A) system design being verified
(T) seven (7) verification
test probes wired
onto system design
for automated verification
20
System Design Verification Suite: LinkageSystems
“DNA signature” auto-generated from SysML parametrics model
(A) system design - config 2
verification pattern: multi-unit test
(rolling up above unit test applied to two designs)
(T) seven (7) verification
test probes wired
onto each system design
for automated verification
(A) system design - config 1
Copyright © Georgia Tech and InterCAX. All Rights Reserved.
SysML and MBSE: A Quick-Start Course
21
Selected Examples: Home Heating System
Wrapped Matlab/Simulink Model – Verification Pattern
verification pattern: unit test
(two SysML diagrams of to visualize same content)
(A) SysML-based
system model
(A) SysML-based
system model
(T) six (6) verification
test probes wired
onto system design
for automated verification
SysML-based V&V added around original models by InterCAX LLC and MathWorks.
22
Simulation Verification Test: Home Heating System
“DNA signature” auto-generated from SysML parametrics model
(T) six (6) test probes wired
onto system design
for automated verification
verification pattern
(A) system design
(as wrapped
Simulink model)
23
Selected Examples: Home Heating System
Wrapped Matlab/Simulink Model – SysML Structure
(A) SysML-based system model
(C) Simulink model
(B) SysML-based wrapper
(with automated interface via ParaMagic)
Based on original models by InterCAX LLC and MathWorks.
24
Selected Examples: Wrapping Solver Models
SysML-wrapped system dynamics models
(home heating system in Matlab/Simulink)
SysML-wrapped FEA models
(linkage systems in Ansys)
25
System M&S
Examples in STK
Force-on-Force Fighter Simulation
Geo-positioning Model
(a) Normal model view
Missile Launcher Model
(b) Marker & trajectory history view
Communications Link Simulation between Satellite and Ground Station
Based on original models by AGI.
(a) Link with ground station at t=t1
(b) Link with ground station at t=t2
(several orbits after t1)
(c) Link broken with ground station at t=t3
(~10 minutes after t2)
26
Contents: SERC RT21 – GIT Effort
• Primary Content
– Project VV&A objectives
– Process being used
– Products being produced
– Progress update
• Summary
• Additional Background Material
27
Summary (per SERC impact questions)
• Who cares?
– All M&S and VV&A stakeholders (given benefits below)
• If you're successful, what difference will it make?
Reduced
Time
Reduced
Cost
Reduced
Risk
Increased
Understanding
Increased
Corporate Memory
Increased Artifact
Performance
– Our approach provides Enabling Capabilities (table rows below),
which produces Primary Impacts
Primary Impacts
enterprise
MOEs
(table columns)
(measures of effectiveness)
– Ex. Related earlier studies
achieved 75% reduction
methods/tools MOPs
(measures of performance)
in M&S time and enabled
Enabling Capabilities
Increased Knowledge
increased analysis intensity
■
■
Capture & Completeness
Increased
– We are endeavoring to demo
■
■
■
■
Modularity & Reusability
basis for similar benefits
Increased
■
■
Traceability
in this SERC effort
Reduced
■
■
■
Manual Re-Creation
(with quantification targeted
Increased
& Data Entry Errors
■
■
■
for future phases)
Automation
4/13/2015
Reduced
Modeling Effort
Increased
Analysis Intensity
■
■
■
■
■
■
■
28
■
28
Additional Background Material
Background
• Lab/Center History @ Georgia Tech
– Engineering Information Systems Lab (1996-2006), etc.
– Modeling & Simulation Lab (2006-Present)
• Director: R Peak www.msl.gatech.edu
– Product & Systems Lifecycle Management Center (2005-Present)
• Director: L McGinnis
Associate Directors: C Paredis and R Peak
• Being renamed: Model-Based Systems Engineering (MBSE) Center
• Specializations
– Knowledge representations for engineering (languages, algorithms, ...)
– Modeling & simulation interoperability
– Model-based systems engineering / engineering / X (MBSE/MBE/MBX)
• Sample Accomplishments
–
–
–
–
4/13/2015
Composable objects (became basis for SysML parametrics)
MRA/MIM patterns for modeling & simulation
Commercialization via spin-off company: InterCAX LLC
Contributions to related standards (SysML, ISO 10303, ...)
and organizations (INCOSE, OMG, ...)
30
Biosketch
www.omg.org/ocsmp
Russell Peak, PhD is a Senior Researcher at the Georgia Institute of Technology where he serves as
Director of the Modeling & Simulation Lab (www.msl.gatech.edu) and Associate Director of the Product
& Systems Lifecycle Management (PSLM) Center (www.pslm.gatech.edu). He is also the CTO at
InterCAX LLC (www.InterCAX.com)—a spin-off company that has commercialized his work from
Georgia Tech.
Dr. Peak specializes in knowledge-based methods for modeling & simulation, standards-based
product lifecycle management (PLM) frameworks, and knowledge representations that enable complex
system interoperability. Dr. Peak originated the multi-representation architecture (MRA)—a collection
of patterns for CAD-CAE interoperability—and composable objects (COBs)—a non-causal objectoriented knowledge representation. This work provided a conceptual foundation for executable
parametrics in SysML and for related technology commercialized by InterCAX in the Georgia Tech
VentureLab program.
After six years in industry (Bell Labs and Hitachi), he joined the research faculty at Georgia Tech.
Since 1997 he has been principal investigator on 30+ projects with sponsors including Boeing, IBM,
JPL, Lockheed, NASA, Rockwell Collins, Sandia, Shinko (Japan), TRW Automotive, US DoC (NIST)
and DoD. He has authored over 80 publications (including several Best Paper awards), holds several
patents, is an active member in ASME and INCOSE, and represents Georgia Tech on the OMG
SysML task force, and is a Content Developer for the OMG Certified Systems Modeling Professional
(OCSMP) program. As of September 2010 he has conducted numerous SysML short courses
for 265+ professionals (www.pslm.gatech.edu/courses).
Dr. Peak leads the INCOSE MBSE Challenge Team (www.pslm.gatech.edu/projects/incose-mbse-msi) for
Modeling & Simulation Interoperability with applications to mechatronics (including mobile robotics
testbeds) as a representative complex systems domain.
Contact:
[email protected]
Copyright © Georgia Tech and InterCAX. All Rights Reserved.
SysML and MBSE: A Quick-Start Course
31
X-Analysis Integration Techniques (c.1993-2004)
for Modeling & Simulation Interoperability
http://eislab.gatech.edu/research/
a. Multi-Representation Architecture (MRA)
3
Analyzable
Product Model
Design Model
4 Context-Based Analysis Model
APM
1 Solution Method Model
CBAM
Solder
Joint
Component
i
ABB
T0
Component
body 1
body4
 linear-elastic model
 primary structural
material
ABBSMM
C
L

h1
base: Alumina
Epoxy
PWB
body3
APM ABB
core: FR4
Plane Strain Bodies System
2 ABB

 total height, h c
Component
Solder
Joint
Solder Joint Plane Strain Model
4 CBAM
SMM
APM ABB
Solder Joint
Analysis Model
PWA Component Occurrence
3 APM
2 Analysis Building Block
Printed Wiring Assembly (PWA)
b. Explicit Design-Analysis Associativity
body 1
body 4
body
body 2
body 2
PWB
To
3
plane strain bodyi , i = 1...4
geometryi
materiali (E,  ,  )
Printed Wiring Board (PWB)
Design Tools
Informal Associativity Diagram
Solution Tools
4 CBAM
c. Analysis Module Creation Methodology
Analysis Module Catalogs
Analysis Procedures
sj
solder joint
shear strain
range
component
occurrence
c

component
total height
hc
linear-elastic model
[1.1]
total thickness
Commercial
Design Tools
Product
Model
Selected Module
ECAD
Idealization/
Defeaturization
Component
Solder Joint
Commercial
Analysis Tools
solder joint
solder
hs
linear-elastic model
[1.1]
detailed shape
[1.2]
linear-elastic model
[2.1]
Ts
average
bilinear-elastoplastic model
Ansys
CAE
[2.2]
a
L1
h1
stress-strain
model 1
T1
L2
h2
stress-strain
model 2
T2
geometry model 3
stress-strain
model 3
T3
 xy, extreme, 3
T sj
 xy, extreme, sj
Constrained Object-based Analysis Module
PWB
APM  CBAM  ABB SMM
© 1993-2006 GTRC
primary structural material
Tc
Ls
[1.2]
rectangle
(Module Usage)
Solder Joint Deformation Model
MCAD
1.25
length 2 +
pwb
Plane Strain
Bodies System
T0
Lc
Physical Behavior Research,
Know-How, Design Handbooks, ...
Ubiquitous Analysis
deformation model
approximate maximum
inter-solder joint distance
primary structural material
1 SMM
2 ABB
Fine-Grained Associativity
Ubiquitization
(Module Creation)

3 APM
ABB SMM
Constraint Schematic View
Abaqus
Engineering Information Systems Lab  eislab.gatech.edu
32
Commercializing GIT XaiTools™
Technology for Executing SysML Parametrics
www.InterCAX.com
Vendor
Atego
SysML
Tool
Studio
Prototype by
GIT
Product by
InterCAX LLC
Yes
ParaSolver™
(2010-2H release)
(formerly Artisan)
EmbeddedPlus
E+ SysML / RSA
Yes
<tbd>
No Magic
MagicDraw
Yes
ParaMagic®
(Jul 21, 2008 release)
Telelogic/IBM
—
Rhapsody
Melody™
(2010-1Q release)
Sparx Systems
Enterprise Architect
n/a
XMI import/export
Others <tbd>
Others <tbd>
<tbd>
<tbd>
Yes
<tbd>
<tbd>
<tbd>
[1] Full disclosure: InterCAX LLC is a spin-off company originally created to commercialize technology from RS Peak’s GIT group. GIT has licensed technology to InterCAX and has an
equity stake in the company. RS Peak is one of several business partners in InterCAX. Commercialization of the SysML/composable object aspects has been fostered by the GIT
VentureLab incubator program (www.venturelab.gatech.edu) via an InterCAX VentureLab project initiated October 2007.
Copyright © Georgia Tech and InterCAX. All Rights Reserved.
SysML and MBSE: A Quick-Start Course
33
InterCAX Products & Services
www.InterCAX.com
Copyright © Georgia Tech and InterCAX. All Rights Reserved.
SysML and MBSE: A Quick-Start Course
34
Curriculum History & Formats Offered

Statistics as of Sept 2010 — www.pslm.gatech.edu/courses
Full-semester Georgia Tech academic courses
– ISYE / ME 8813 & 4803: Since Fall 2007 (~95 students total)

Industry short courses
– Collaborative development & delivery with InterCAX LLC
– Multiple [offerings,~students] and formats since Aug 2008
» SysML 101 [14,~260]; SysML 102 (hands-on) [12,~205]
– Modes: » Onsite at industry/government locations
» Open enrollment via Georgia Tech (Atlanta, DC, Orlando, Vegas, ...)
» Web-based “live” since Apr 2010
– Coming soon: 201/202, 301/302 (int/adv concepts, OCSMP prep, ...)

Georgia Tech Professional Masters academic courses
– Professional Masters in Applied Systems Engineering
www.pmase.gatech.edu
– ASE 6005 SysML-based MBSE course - Summer 2010
– ASE 6006 SE Lab (SysML-based system design project) - Fall 2010
Copyright © Georgia Tech and InterCAX. All Rights Reserved.
SysML and MBSE: A Quick-Start Course
35
Industry Short Course Contents
SysML 101: Tool-Independent Concepts Focus (1 day)
The 4 Pillars of SysML
Automotive Anti-Lock Braking System Example
1. Structure
2. Behavior
sd ABS_ActivationSequence [Sequence Diagram]
stm TireTraction [State Diagram]
m1:Brake
d1:Traction
Modulator
Detector
LossOfTraction
detTrkLos()Gripping
sendSignal()
module
topic
interaction
state
machine
Slipping
activity/
function
RegainTraction
modBrkFrc(traction_signal:boolean)
modBrkFrc()
definition
use
sendAck()
Course Context
000.01 Introduction and course overview
SysML 101: Essentials for Understanding SysML Models
3. Requirements
101.01 MBSE context & motivation
101.02 SysML introduction & overview; Course examples overview
101.03 Structure concepts: block basics (bdd), instances; packages (pkg)
101.04 Structure concepts: block internals, ports, flows (ibd)
101.05 Upfront concepts: use cases (uc); requirements (req)
101.06 Behavior concepts: activities, actions (act)
101.07 Behavior concepts: interactions/sequences (seq); state machines (stm)
101.08 Structure concepts: block parametrics (par)
101.09 Cross-cutting SysML concepts, methods, and processes
101.99 Wrapup — SysML 101
Copyright © Georgia Tech and InterCAX. All Rights Reserved.
SysML and MBSE: A Quick-Start Course
4. Parametrics
36
Industry Short Course Contents
SysML 102: Hands-on Execution-Oriented Focus (2.5 days)
module
topic
SysML 102: Essentials for Creating SysML Models (Hands-On for Tool Users)
102.01 User workstation setup
102.02 Tool familiarity introduction - how to browse existing models, etc.
102.03 Structure concepts: block basics (bdd), instances; packages (pkg)
102.04 Structure concepts: block internals, ports, flows (ibd)
102.05 Upfront concepts: use cases (uc); requirements (req)
102.06 Behavior concepts: activities, actions (act) (w/ Myro rover team excercise)
102.07 Behavior concepts: interactions/sequences (seq); state machines (stm)
102.08 Structure concepts: block parametrics (par)
102.09 Cross-cutting SysML concepts, methods, and processes
102.10 MBSE processes: model-based document/report generation (Velocity, etc.)
102.11 MBSE processes: model repositories / Teamwork Server introduction for users
102.99 Wrapup — SysML 102
Approximate structure for each main concept module in SysML 102:
Spiral 1: How to implement basic concepts from SysML 101 in MagicDraw
Spiral 1: Corresponding student exercise
Spiral 1: Corresponding Q/A
Spiral 2: How to implement other concepts (from SysML 101 and more)
Spiral 2: Corresponding student exercise
Spiral 2: Corresponding Q/A
Copyright © Georgia Tech and InterCAX. All Rights Reserved.
SysML and MBSE: A Quick-Start Course
37
Mobile Robot
Context
(a cyber-physical system)
Copyright © Georgia Tech and InterCAX. All Rights Reserved.
SysML and MBSE: A Quick-Start Course
38
Mobile Robot Exercise
from myro import *
initialize("com29")
senses()
Executable SysML Activity Model [after live update]
beep(1, 440)
Resulting python script 
Copyright © Georgia Tech and InterCAX. All Rights Reserved.
SysML and MBSE: A Quick-Start Course
forward(1, 1)
turnRight(1, .4)
forward(1, 1)
beep(1, 440)
turnRight(1, .4)
forward(1, 1)
turnRight(1, .4)
forward(1, 1)
stop()
39
Decision Nodes / Guard Conditions
and Merge Nodes
decision node
guard condition
(with sensor reading)
merge node*
Copyright © Georgia Tech and InterCAX. All Rights Reserved.
SysML and MBSE: A Quick-Start Course
40
SysML Activities Exercise @ JPL
Team Contest Using MyroMagic Plugin & Scribbler Rovers
Object2
end location
Object1
end location
ra1 = ?
ra2 = ?
Object1
target location
rt1= 30”
(anywhere on this circle)
Object1
start location
45
Copyright © Georgia Tech and InterCAX. All Rights Reserved.
Object2
start location
de
g,
12
”
”
, 14
deg
60
SysML and MBSE: A Quick-Start Course
Object2
target location
rt2 = 30”
(anywhere on this circle)
41