Transcript Source Driver IC

LCD Panel Training Manual
2008. 3. 15
VD R&D 4Lab.
Contents
1. LCD Panel Structure & Operation
2. LCD Panel Manufacturing Process
3. Q&A
LCD Panel Structure & Operation
LCD On/Off Theory
d=p/4
OFF
ON
TN Mode
Panel Structure
LCD Module
BLU
LCD Cell
Drain(Cr)
Gate(Al-Nd)
Cross section
Color Filter
BM(Black Matrix)
CLC
ITO
Cst
(storage capacitance)
a-Si
Source(Cr)
Drain(Cr)
G(gate)
Polarize
plate
T-con & Driver
Gamma Voltage
Vcom
HCLK
RVS/RVSB
Start Horizontal signal
Load signal
RGB(0:N)
Vcc
analog data
R(0:N)
G(0:N)
G(0:N)
B(0:N)
Graphic
Controller
B(0:N)
Hsync
Timing
LVDS
Vsync
Control IC
(Gate Array)
DE
MCLK
Gate Clock
Output Enable
AVdd
Start Vertical signal
Von
DC/DC
Voff
Gate Driver IC
CP
U
R(0:N)
Source Driver IC
AVdd
T-Con Block Diagram
Gate Driver IC
STV
Carry in
out(1~n)
CPV
Gate Clock
U/D
OE1
OE2
INPUT
SHIFT
INPUT
CIRCUIT
REGISTER
CONTROL
OE3
Vcom
Von
Voff
Carry out
BUFFER
Source Driver IC
R(0:N)
G(0:N)
B(0:N)
Data
Data
64 * 1
64 * 1
Decoder
Decoder
Carry Out
Shift Register
STH(Carry in)
DCLK
L/R
LOAD Signal(TP)
Rising
Latch
OP AMP
OP AMP
Vcom
Vcom
V0
V1
D/A Converter
Vn
LOAD Signal(TP)
Falling
Voltage follower output
n channel
output
LC Operation
Source line
Gate line
Common
electrode
Vcom
Liquid
crystal
layer
Gate On
액정
capacitor
Clc
Gate Off
storage
capacitor
Cst
Display
electrode
Common
electrode
Vcom
Liquid
crystal
layer
액정
capacitor
Clc
Display
electrode
storage
capacitor
Cst
Gate On
Voltage
When Gate is off, Ioff current leaks and
Storage capacitor (Cst) is used for clamp the
data voltage during Gate off-period
Data
voltage
ΔV
Voltage drop
Vcom
Gate Off
Voltage
Gate On
Gate Off
LVDS Interface
Timing
628H
Vsync
Hsync
4H
23H
600H
1H
DE
1056clk
Hsync
128clk
88clk
800clk
CLK
DE
DATA
INVALID
VALID
40clk
RSDS Interface
mini-LVDS Interface
PPDS Interface
AiPi Interface
Gamma correction
Panel Manufacturing Process
TFT Array Process
Data pattern
Gate electrode
Glass Substrate
Gate Insulation
Layer (SiNX)
Gate electrode & Cs electrode
Color Filter Array Process
Common
Electrode
Over Coat
Glass Substrate (Depth 0.7mm)
Color Filter Pixel Design
LC Cell Process
Common electrode (ITO)
Polarizer
Color filter Glass
LC
PI Layer
TFT-Array Glass
Pixel electrode (ITO)
Polarizer
PI Print Process
Alignment
Layer
Alignment
Layer
(T<100 Å)
PI Mask
Move
Seal Print Process
Seal
pattern
TFT-Array Substrate
TFT Array Substrate
Alignment
Layer
Alignment
Layer
Seal
pattern
Short Dispense Process
Alignment
Layer
Common Electrode
Color filter Substrate
TFT Array Substrate
Seal
pattern
LC Injection
Spacer Process
Color filter Glass
Color filter Glass
LC Drop Filling Process
Cell Scribe & Break Process
LCD Panel
Polarizer Attachment Process
LCM Process
Output
COG & TAB
TCP Bonding Process
Handling Cautions
☞ Do not twist & bend on the module.
☞ Refrain from strong mechanical shock or any force to the module.
☞ Do not press or scratch the surface harder than a HB pencil lead.
☞ Wipe off water droplets or oil immediately
☞ When the surface of polarizer is dirty, Clean with IPA, Hexane.
☞ Do not use Acetone, Ethyl alcohol & Keton type materials.
☞ Protect the module from the electro-static discharge.
☞ When the module is assembled in the set, Use finger rubber.
☞ Do not adjust the variable resistor.
☞ Do not store the TFT-LCD module in the direct sunlight.
☞ Power off, When you connect or remove the module.
Thank You !